228 lines
9.2 KiB
C
228 lines
9.2 KiB
C
/****************************************************************************
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* configs/efm32-g8xx-stk/include/board.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __CONFIGS_EFM32_G8XX_STK_INCLUDE_BOARD_H
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#define __CONFIGS_EFM32_G8XX_STK_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include "chip/efm32_cmu.h"
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#include "chip/efm32_usart.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* Clock Sources
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* - 1-28 MHz High Frequency RC Oscillator (HFRCO)
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* - 4-32 MHz High Frequency Crystal Oscillator (HFXO)
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* - 32.768 kHz Low Frequency RC Oscillator (LFRCO)
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* - 32.768 kHz Low Frequency Crystal Oscillator (LFXO)
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* - 1KHz Ultra Low Frequency RC Oscillator (ULFRCO)
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*
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* The device boots with 14 MHz HFRCO as the HFCLK source.
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*/
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#define BOARD_HAVE_HFXO 1 /* Have High frequency crystal oscillator */
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#define BOARD_HAVE_LFXO 1 /* Have Loq frequency crystal oscillator */
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#define BOARD_HFRCO_FREQUENCY 14000000 /* 14MHz on reset */
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#define BOARD_HFXO_FREQUENCY 32000000 /* 32MHz crystal on board */
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#define BOARD_LFRCO_FREQUENCY 32768 /* Low frequency oscillator */
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#define BOARD_LFXO_FREQUENCY 32768 /* 32MHz crystal on board */
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#define BOARD_ULFRCO_FREQUNCY 1000 /* Ultra low frequency oscillator */
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/* HFCLK - High Frequency Clock
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*
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* HFCLK is the selected High Frequency Clock. This clock is used by the CMU
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* and drives the two prescalers that generate HFCORECLK and HFPERCLK. The
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* HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one
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* of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is
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* selected.
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*/
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#define BOARD_HFCLKSEL _CMU_CMD_HFCLKSEL_HFXO
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#define BOARD_HFCLKDIV 0 /* Does not apply to EFM32G */
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#define BOARD_HFCLK_FREQUENCY BOARD_HFXO_FREQUENCY
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/* HFCORECLK - High Frequency Core Clock
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*
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* HFCORECLK is a prescaled version of HFCLK. This clock drives the Core
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* Modules, which consists of the CPU and modules that are tightly coupled
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* to the CPU, e.g. MSC, DMA etc. The frequency of HFCORECLK is set using
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* the CMU_HFCORECLKDIV register.
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*/
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#define BOARD_HFCORECLKDIV _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT
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#define BOARD_HFCORECLK_FREQUENCY BOARD_HFXO_FREQUENCY
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/* HFPERCLK - High Frequency Peripheral Clock
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*
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* Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This
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* clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is
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* set using the CMU_HFPERCLKDIV register.
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*/
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#define BOARD_HFPERCLKDIV _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT
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#define BOARD_HFPERCLK_FREQUENCY BOARD_HFXO_FREQUENCY
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/* LFACLK - Low Frequency A Clock
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*
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* LFACLK is the selected clock for the Low Energy A Peripherals. There are
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* four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
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* From reset, the LFACLK source is set to LFRCO. However, note that the
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* LFRCO is disabled from reset. The selection is configured using the LFA
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* field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A
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* Peripherals to be used as high-frequency peripherals.
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*
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* Use _CMU_LFCLKSEL_LFA_DISABLED to disable.
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* ULFRCO is a special case.
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*/
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#define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFXO
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#undef BOARD_LFACLK_ULFRCO
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#define BOARD_LFACLK_FREQUENCY BOARD_LFXO_FREQUENCY
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/* LFBCLK - Low Frequency B Clock
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*
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* LFBCLK is the selected clock for the Low Energy B Peripherals. There are
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* four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
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* From reset, the LFBCLK source is set to LFRCO. However, note that the
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* LFRCO is disabled from reset. The selection is configured using the LFB
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* field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B
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* Peripherals to be used as high-frequency peripherals.
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*
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* Use _CMU_LFCLKSEL_LFA_DISABLED to disable
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* ULFRCO is a special case.
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*/
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#define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFXO
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#undef BOARD_LFBCLK_ULFRCO
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#define BOARD_LFBCLK_FREQUENCY BOARD_LFXO_FREQUENCY
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/* PCNTnCLK - Pulse Counter n Clock
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*
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* Each available pulse counter is driven by its own clock, PCNTnCLK where
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* n is the pulse counter instance number. Each pulse counter can be
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* configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK.
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*/
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/* WDOGCLK - Watchdog Timer Clock
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*
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* The Watchdog Timer (WDOG) can be configured to use one of three different
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* clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC
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* Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3.
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*/
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/* AUXCLK - Auxiliary Clock
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*
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* AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO.
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* This clock is used for flash programming and Serial Wire Output (SWO).
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* During flash programming this clock will be active. If the AUXHFRCO has
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* not been enabled explicitly by software, the MSC will automatically
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* start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN
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* in CMU_OSCENCMD. This explicit enabling is required when SWO is used.
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*/
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/* LEDs *********************************************************************/
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/* The EFM32 Gecko Starter Kit supports 4 yellow LEDs. One side is grounded
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* so these LEDs are illuminated by outputting a high value.
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
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* any way. The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED0 0
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#define BOARD_LED1 1
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#define BOARD_LED2 2
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#define BOARD_LED3 3
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#define BOARD_NLEDS 4
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED0_BIT (1 << BOARD_LED0)
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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#define BOARD_LED3_BIT (1 << BOARD_LED3)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on
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* board the EFM32 Gecko Starter Kit. The following definitions describe
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* how NuttX controls the LEDs in this configuration:
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*/
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#define LED_STARTED 0 /* LED0 */
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#define LED_HEAPALLOCATE 1 /* LED1 */
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#define LED_IRQSENABLED 2 /* LED0 + LED1 */
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#define LED_STACKCREATED 3 /* LED2 */
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#define LED_INIRQ 4 /* LED0 + LED2 */
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#define LED_SIGNAL 5 /* LED1 + LED3 */
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#define LED_ASSERTION 6 /* LED0 + LED2 + LED2 */
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#define LED_PANIC 7 /* N/C + N/C + N/C + LED3 */
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/* Pin routing **************************************************************/
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/* UART0:
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*
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* U0_RX #1 PE1 **AVAILABLE at TP130**
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* U0_TX #1 PE0 **AVAILABLE at TP129**
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*/
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#define BOARD_UART0_RX_GPIO (GPIO_PORTE|GPIO_PIN1)
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#define BOARD_UART0_TX_GPIO (GPIO_PORTE|GPIO_PIN0)
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#define BOARD_UART0_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC1
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/* LEUART0:
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*
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* LEU0_RX #0 PD5 **AVAILABLE at TP123 and EXP port pin 14**
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* LEU0_TX #0 PD4 **AVAILABLE at TP122 and EXP port pin 12**
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*/
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#define BOARD_LEUART0_RX_GPIO (GPIO_PORTD|GPIO_PIN5)
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#define BOARD_LEUART0_TX_GPIO (GPIO_PORTD|GPIO_PIN4)
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#define BOARD_LEUART0_ROUTE_LOCATION _LEUART_ROUTE_LOCATION_LOC0
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#endif /* __CONFIGS_EFM32_G8XX_STK_INCLUDE_BOARD_H */
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