nuttx/boards/arm/sam34/sam4cmp-db
cuiziwei 4ec7af779d nuttx/boards:init_array.* needs to be executed in order
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program.

I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
2023-08-29 22:54:37 +08:00
..
configs/nsh sched: Remove SDCLONE_DISABLE option and config 2022-01-31 19:03:20 +01:00
include boards: arm: Author Masayuki Ishikawa: Update license to Apache 2021-03-14 22:23:05 -07:00
scripts nuttx/boards:init_array.* needs to be executed in order 2023-08-29 22:54:37 +08:00
src Rename CONFIG_LIB_BOARDCTL to CONFIG_BOARDCTL 2021-08-06 13:58:26 +02:00
Kconfig
README.txt Remove the double blank line from source files 2022-02-20 20:10:14 +01:00

README
^^^^^^

README for NuttX port to the SAM4CMP-DB board.

  http://www.atmel.com/tools/SAM4CMP-DB.aspx

The board is intended to test NuttX SMP features for dual Cortex-M4.

Settings
^^^^^^^^
1. Both CPUs are running at 92.160MHz with PLLB.
2. Serial console can be used via on-board USB-UART (115200/8/N/1)
3. Interrupt handlers such as timer and UART are handled on CPU0
4. Both CPUs share internal SRAM0 (128KB)
5. SRAM1 is used to boot CPU1.
6. Cache controllers are disabled because of no snooping features.

Status
^^^^^^
Currently SMP freature works on the board but is not stable.

1. "nsh> sleep 1 &" works without crash.
2. "nsh> smp " sometimes works but some assertions might happen.
3. "nsh> ostest " causes deadlocks during the test.