22877e0fa5
modify format add two new boards doc modify bug Signed-off-by: mishuaishuai <wangshuai26@xiaomi.com>
144 lines
3.6 KiB
Plaintext
144 lines
3.6 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_BOARD_GD32F470ZK_AIOTBOX
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choice
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prompt "Select Console wiring."
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default GD32F470ZK_AIOTBOX_CONSOLE_BOARD
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---help---
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Select where you will connect the console.
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Virtual COM Port:
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Advantage: Use the ST-Link as a console. No Extra wiring
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needed.
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Disadvantage: Not the best choice for initial bring up.
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BOARD USART Connector:
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Advantage: You have a shield so it is easy.
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Disadvantage: You loose the use of the
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other functions on PA9, PA10
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GD32F470ZK_AIOTBOX
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USART0 GPIO
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-- ----- --------- ----
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RX USART0_RX PA10
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TX USART0_TX PA9
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-- ----- --------- ---
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config GD32F470ZK_AIOTBOX_CONSOLE_BOARD
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bool "Aiotbox Com Connector"
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select GD32_USART0
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select USART0_SERIALDRIVER
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config GD32F470ZK_AIOTBOX_CONSOLE_VIRTUAL
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bool "Virtual ComPort"
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select GD32_USART3
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select USART3_SERIALDRIVER
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config GD32F470ZK_AIOTBOX_CONSOLE_NONE
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bool "No Serial Console"
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endchoice # "Select Console wiring"
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choice
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prompt "GD32F470Z MCU Crystal Selected"
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default GD32F470Z_BOARD_USE_HXTAL_AIOTBOX
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config GD32F470Z_BOARD_USE_HXTAL_AIOTBOX
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bool "Use Hxtal as clock source"
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# select GD32F470Z_BOARD_HXTAL_VALUE
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config GD32F470Z_BOARD_USE_IRC16_AIOTBOX
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bool "Use IRC16M as clock source"
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endchoice # CPU Frequency
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config GD32F470Z_BOARD_HXTAL_VALUE
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int "GD32F470Z Eval Board Hxtal Value"
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default 25000000
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depends on GD32F470Z_BOARD_USE_HXTAL
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---help---
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GD32F470Z Eval Board Hxtal Value, default is 25MHz.
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choice
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prompt "GD32F470 MCU System Frequency"
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default GD32F470_200MHZ_AIOTBOX
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config GD32F470_240MHZ_AIOTBOX
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bool "240 MHz"
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config GD32F470_200MHZ_AIOTBOX
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bool "200 MHz"
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config GD32F470_168MHZ_AIOTBOX
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bool "168 MHz"
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config GD32F470_120MHZ_AIOTBOX
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bool "120 MHz"
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endchoice # CPU Frequency
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config GD32F470ZK_AIOTBOX_GD25_BLOCKMOUNT
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bool "GD25 serial FLASH auto-mount"
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default n
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depends on GD32F4_SPI5 && MTD_GD25
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---help---
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Automatically initialize the GD25 SPI FLASH driver when NSH starts.
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choice
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prompt "GD25 SPI FLASH configuration"
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default GD32F470ZK_AIOTBOX_GD25_NXFFS
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depends on GD32F470ZK_AIOTBOX_GD25_BLOCKMOUNT
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config GD32F470ZK_AIOTBOX_GD25_FTL
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bool "Create GD25 SPI FLASH block driver"
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---help---
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Create the MTD driver for the GD25 and "wrap" the GD25 as a standard
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block driver that could then, for example, be mounted using FAT or
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any other file system. Any file system may be used, but there will
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be no wear-leveling.
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config GD32F470ZK_AIOTBOX_GD25_NXFFS
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bool "Create GD25 serial FLASH NXFFS file system"
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depends on FS_NXFFS
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---help---
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Create the MTD driver for the GD25 and mount the GD25 device as
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a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
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NXFFS is that it can be very slow.
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config GD32F470ZK_AIOTBOX_GD25_LITTLEFS
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bool "Create GD25 serial FLASH LFS file system"
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depends on FS_LITTLEFS
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---help---
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Create the MTD driver for the GD25 and mount the GD25 device as
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a wear-leveling, LittleFS FLASH file system (LFS).
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endchoice # GD25 serial FLASH configuration
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config GD32F470ZK_AIOTBOX_AT24_TEST
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bool "I2C0 EEPROM AT2402 write and read test"
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default n
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depends on NSH_ARCHINIT && GD32F4_I2C0 && MTD_AT24XX
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---help---
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Automatically initialize and test the AT24 I2C EEPROM driver when
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NSH starts. After test the I2C0 will be released.
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config AT24XX_MTD_BLOCKSIZE
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int "AT24xx MTD block size"
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default 8
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depends on GD32F470ZK_AIOTBOX_AT24_TEST
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---help---
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The block size must be an even multiple of the pages.
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The page size of AT2402 on the board is 8 Byte.
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endif # ARCH_BOARD_GD32F470ZK_AIOTBOX
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