.. |
chip
|
SAM4CM: Fix SUPC register definitions. From Max Neklyudov
|
2015-06-22 06:52:57 -06:00 |
chip.h
|
|
|
Kconfig
|
SAM4L: GPIO interrupts are not yet supported; can't compile sam_gpioirq.c yet
|
2015-07-03 09:33:52 -06:00 |
Make.defs
|
arch/arm/src/up_iternal.h and several ARM Make.defs files: In the original implementation, NOT defined(CONFIG_ARMV7M_CMNVECTOR) was a sufficient test to determine if lazy floating point register saving was being used. But recents changes added common lazy register as well so now that test must be (NOT defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU)).
|
2015-08-31 08:40:02 -06:00 |
sam3u_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam3u_periphclks.h
|
|
|
sam3x_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam3x_periphclks.h
|
|
|
sam4cm_freerun.c
|
Logic that samples the free running counter reads the pending interrupt status regsiter and can cause interrupts to be lost. So, if when the status regsiter is read, the logic must also handle the timer overflow event. Found and fixed by Max Neklyudov
|
2015-05-26 08:09:10 -06:00 |
sam4cm_freerun.h
|
SAM4CM free-running time: Change overflow type from uint16 to uint32. From Max Neklyudov.
|
2015-02-25 08:12:31 -06:00 |
sam4cm_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam4cm_oneshot.c
|
SAM4CM: Add support for tickless operation
|
2015-02-03 07:00:54 -06:00 |
sam4cm_oneshot.h
|
SAM4CM: Add support for tickless operation
|
2015-02-03 07:00:54 -06:00 |
sam4cm_periphclks.h
|
|
|
sam4cm_supc.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam4cm_supc.h
|
|
|
sam4cm_tc.c
|
SAM4CM: Add support for tickless operation
|
2015-02-03 07:00:54 -06:00 |
sam4cm_tc.h
|
SAM4CM: Add support for tickless operation
|
2015-02-03 07:00:54 -06:00 |
sam4cm_tickless.c
|
Fix a compilation error. From Macs Neklyudov
|
2015-02-16 14:30:15 -06:00 |
sam4e_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam4e_periphclks.h
|
|
|
sam4l_clockconfig.c
|
Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
|
2015-09-01 13:47:06 -04:00 |
sam4l_gpio.c
|
Two r's and only two r's in the word interrupt
|
2015-04-23 14:04:43 -06:00 |
sam4l_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam4l_periphclks.c
|
|
|
sam4l_periphclks.h
|
|
|
sam4s_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam4s_periphclks.h
|
|
|
sam_aes.c
|
sam4cm: add CFB and MAC AES modes. From Max Neklyudov
|
2015-06-22 06:42:37 -06:00 |
sam_aes.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_allocateheap.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_clockconfig.c
|
SAM4S/4E: Eand default loop optimiozation if EEFC_FMR configuration. From Marco Aurélio da Cruz
|
2015-06-11 14:35:49 -06:00 |
sam_clockconfig.h
|
|
|
sam_cmcc.c
|
|
|
sam_cmcc.h
|
|
|
sam_dmac.c
|
Fix some common typos
|
2015-08-16 10:59:10 -06:00 |
sam_dmac.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_emac.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_emac.h
|
|
|
sam_gpio.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_gpio.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_gpioirq.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_hsmci.c
|
Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
|
2015-09-01 13:47:06 -04:00 |
sam_hsmci.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_irq.c
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
sam_lowputc.c
|
Fix some warnings/errors detected by nuttx/tools/testbuilds.sh
|
2015-07-10 18:41:26 -06:00 |
sam_lowputc.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_mpuinit.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_mpuinit.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_periphclks.h
|
|
|
sam_rtc.c
|
Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
|
2015-09-01 13:47:06 -04:00 |
sam_rtc.h
|
RTC: Remove all backdoor interfaces from rtc.h
|
2015-02-13 08:41:34 -06:00 |
sam_rtt.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_rtt.h
|
|
|
sam_serial.c
|
SAM4CM: Add support for optical mode for UART1. From Max Neklyudov.
|
2015-05-23 06:48:36 -06:00 |
sam_spi.c
|
|
|
sam_spi.h
|
Include chip/sam_spi.h in sam_spi.h
|
2015-03-20 11:09:36 -06:00 |
sam_start.c
|
In go_os_start that sets the IDLE thread stack coloration, mov does not set condition codes which are tested by the following beq. Need to use movs instead. Noted by David Sidrane
|
2015-05-07 20:36:08 -06:00 |
sam_tc.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_tc.h
|
|
|
sam_timerisr.c
|
Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
|
2015-09-01 13:47:06 -04:00 |
sam_twi.c
|
SAM3/4: Add a TWI driver for the SAM4CM. From Max Neklyudov.
|
2015-06-22 09:32:15 -06:00 |
sam_twi.h
|
SAM3/4: Add a TWI driver for the SAM4CM. From Max Neklyudov.
|
2015-06-22 09:32:15 -06:00 |
sam_udp.c
|
Fix more common typos
|
2015-08-16 11:06:29 -06:00 |
sam_udp.h
|
Clean up and review of header files for conformance to standards
|
2015-06-12 19:26:01 -06:00 |
sam_userspace.c
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_userspace.h
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_vectors.S
|
Make some file section headers more consistent with standard
|
2015-04-08 08:04:12 -06:00 |
sam_wdt.c
|
Correct some problems with SAM3/4 watchdog driver. Includes some small improvements. From Max Neklyudov.
|
2015-07-21 07:15:39 -06:00 |
sam_wdt.h
|
Clean up and review of header files for conformance to standards
|
2015-06-12 19:00:52 -06:00 |