In SMP mode, the fpu owner may switch from core0 to core1, so it is necessary to force saving the FPU context when a context switch occurs. This PR fixed the crash issue mentioned in #8799. Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
In SMP mode, the fpu owner may switch from core0 to core1, so it is necessary to force saving the FPU context when a context switch occurs. This PR fixed the crash issue mentioned in #8799. Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>