101 lines
4.0 KiB
C
101 lines
4.0 KiB
C
/****************************************************************************
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* arch/arm/include/efm32/efm32tg_irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_EFM32_EFM32TG_IRQ_H
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#define __ARCH_ARM_INCLUDE_EFM32_EFM32TG_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map
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* directly to bits in the NVIC. This does, however, waste several words of
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* memory in the IRQ to handle mapping tables.
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*
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* Processor Exceptions (vectors 0-15). These common definitions can be
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* found in nuttx/arch/arm/include/efm32/irq.h
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*
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* External interrupts (vectors >= 16)
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*/
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#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS + 0)
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#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS + 1)
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#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS + 2)
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#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS + 3)
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#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS + 4)
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#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS + 5)
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#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS + 6)
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#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS + 7)
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#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS + 8)
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#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS + 9)
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#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS + 10)
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#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS + 11)
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#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS + 12)
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#define EFM32_IRQ_LESENSE (EFM32_IRQ_INTERRUPTS + 13)
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#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS + 14)
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#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS + 15)
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#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS + 16)
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#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS + 17)
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#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS + 18)
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#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS + 19)
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#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS + 20)
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#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS + 21)
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#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS + 22)
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#define EFM32_PERIPH_INTS (23)
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#define EFM32_IRQ_NVECTORS (EFM32_IRQ_INTERRUPTS + EFM32_PERIPH_INTS)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_EFM32_EFM32TG_IRQ_H */
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