bcfabcbe53
Squashed commit of the following:
arch/arm/src/s32k1xx/hardware/s32k1xx_mcm.h: Add MCM register definition file.
arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h: Add memory map definition file.
arch/arm/src/s32k1xx/hardware/s32k1xx_cmu.h: Add CMU register definition file.
arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h: Add PCC register definition file.
arch/arm/src/s32k1xx/hardware/s32k1xx_scg.h: Add SCG register definition file.
arch/arm/src/s32k1xx: Add initial Make.defs files.
Basic configuration logic for the S32K1 family.
83 lines
3.9 KiB
C
83 lines
3.9 KiB
C
/************************************************************************************
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* arch/arm/include/s32k1xx/s32k14x_irq.h
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* This file should never be included directed but, rather, only indirectly through
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* nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_S32K1XX_S32K14XX_IRQ_H
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#define __ARCH_ARM_INCLUDE_S32K1XX_S32K14XX_IRQ_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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#include <arch/stm32/chip.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
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* bits in the NVIC. This does, however, waste several words of memory in the IRQ
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* to handle mapping tables.
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*/
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/* Processor Exceptions (vectors 0-15) */
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#define S32K_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
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/* Vector 0: Reset stack pointer value */
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/* Vector 1: Reset (not handler as an IRQ) */
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#define S32K_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
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#define S32K_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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#define S32K_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
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#define S32K_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
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#define S32K_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
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#define S32K_IRQ_SVCALL (11) /* Vector 11: SVC call */
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#define S32K_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
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/* Vector 13: Reserved */
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#define S32K_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
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#define S32K_IRQ_SYSTICK (15) /* Vector 15: System tick */
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/* External interrupts (vectors >= 16). These definitions are chip-specific */
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#define S32K_IRQ_FIRST (16) /* Vector number of the first external interrupt */
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#warning Missing logic
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#endif /* __ARCH_ARM_INCLUDE_S32K1XX_S32K14XX_IRQ_H */
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