298 lines
11 KiB
C
298 lines
11 KiB
C
/************************************************************************************
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* configs/photon/include/board.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Simon Piriou <spiriou31@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __CONFIG_PHOTON_INCLUDE_BOARD_H
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#define __CONFIG_PHOTON_INCLUDE_BOARD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdbool.h>
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#endif
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#include "stm32_rcc.h"
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#include "stm32.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Clocking *************************************************************************/
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/* The Particle photon board features a single 26MHz crystal.
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*
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* This is the canonical configuration:
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* System Clock source : PLL (HSE)
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* SYSCLK(Hz) : 120000000 Determined by PLL configuration
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* HCLK(Hz) : 120000000 (STM32_RCC_CFGR_HPRE)
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* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
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* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
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* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
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* HSE Frequency(Hz) : 26000000 (STM32_BOARD_XTAL)
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* PLLM : 26 (STM32_PLLCFG_PLLM)
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* PLLN : 240 (STM32_PLLCFG_PLLN)
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* PLLP : 2 (STM32_PLLCFG_PLLP)
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* PLLQ : 5 (STM32_PLLCFG_PLLQ)
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* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
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* Flash Latency(WS) : 3
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* Prefetch Buffer : OFF
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* Instruction cache : ON
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* Data cache : ON
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* Require 48MHz for USB OTG HS : Enabled
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* SDIO and RNG clock
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*/
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/* HSI - 16 MHz RC factory-trimmed
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* LSI - 32 KHz RC
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* HSE - On-board crystal frequency is 26MHz
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* LSE - 32.768 kHz
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*/
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#define STM32_BOARD_XTAL 26000000ul
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#define STM32_HSI_FREQUENCY 16000000ul
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#define STM32_LSI_FREQUENCY 32000
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768
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/* Main PLL Configuration.
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*
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* PLL source is HSE
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* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
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* = (26,000,000 / 26) * 240
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* = 240,000,000
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* SYSCLK = PLL_VCO / PLLP
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* = 240,000,000 / 2 = 120,000,000
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* USB OTG FS, SDIO and RNG Clock
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* = PLL_VCO / PLLQ
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* = 48,000,000
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*/
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#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(26)
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#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(240)
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#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
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#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5)
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#define STM32_SYSCLK_FREQUENCY 120000000ul
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/* AHB clock (HCLK) is SYSCLK (120MHz) */
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
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#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
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#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
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/* APB1 clock (PCLK1) is HCLK/4 (30MHz) */
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
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/* Timers driven from APB1 will be twice PCLK1 */
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#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
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/* APB2 clock (PCLK2) is HCLK/2 (60MHz) */
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
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#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
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/* Timers driven from APB2 will be twice PCLK2 */
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#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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*/
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#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
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/* USB OTG HS definitions ***********************************************************/
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/* Do not enable external PHY clock or OTG_HS module will not work */
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#undef BOARD_ENABLE_USBOTG_HSULPI
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/* LED definitions ******************************************************************/
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/* LEDs
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*
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* A single LED is available driven by PA13.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/sam_autoleds.c. The LEDs are used to encode
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* OS-related events as follows:
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*
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* ------------------- ---------------------------- ------
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* SYMBOL Meaning LED
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* ------------------- ---------------------------- ------ */
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#define LED_STARTED 0 /* NuttX has been started OFF */
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#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
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#define LED_STACKCREATED 1 /* Idle stack created ON */
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#define LED_INIRQ 2 /* In an interrupt N/C */
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#define LED_SIGNAL 2 /* In a signal handler N/C */
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#define LED_ASSERTION 2 /* An assertion failed N/C */
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#define LED_PANIC 3 /* The system has crashed FLASH */
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#undef LED_IDLE /* MCU is is sleep mode Not used */
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/* Thus if LED is statically on, NuttX has successfully booted and is,
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* apparently, running normally. If LED is flashing at approximately
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* 2Hz, then a fatal error has been detected and the system has halted.
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*/
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/* TIM */
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#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1
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#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_1
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#define GPIO_TIM2_CH4OUT GPIO_TIM2_CH4OUT_1
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/* RGB LED
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*
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* R = TIM2 CH2 on PA1 | G = TIM2 CH3 on PA2 | B = TIM4 CH4 on PA3
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*
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* Note: Pin configs: GPIO_TIM2_CH2OUT ; GPIO_TIM2_CH3OUT ; GPIO_TIM2_CH4OUT
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*/
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#define RGBLED_RPWMTIMER 2
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#define RGBLED_RPWMCHANNEL 2
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#define RGBLED_GPWMTIMER 2
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#define RGBLED_GPWMCHANNEL 3
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#define RGBLED_BPWMTIMER 2
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#define RGBLED_BPWMCHANNEL 4
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/* Button definitions ***************************************************************/
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#define BOARD_BUTTON1 0
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#define NUM_BUTTONS 1
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#define BOARD_BUTTON1_BIT (1 << BOARD_BUTTON1)
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/* Alternate function pin selections ************************************************/
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/* UART1 */
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#ifdef CONFIG_STM32_USART1
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# define GPIO_USART1_RX GPIO_USART1_RX_1
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# define GPIO_USART1_TX GPIO_USART1_TX_1
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#endif
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/* SPI1 */
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#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */
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#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 /* PA7 */
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#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* PA5 */
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/* SPI3 */
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#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1 /* PB4 */
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#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_1 /* PB5 */
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#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1 /* PB3 */
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/* SDIO definitions *****************************************************************/
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/* Note that slower clocking is required when DMA is disabled in order
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* to avoid RX overrun/TX underrun errors due to delayed responses
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* to service FIFOs in interrupt driven mode.
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*
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* These values have not been tuned!!!
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*
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* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
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*/
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#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
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/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_SDIO_DMA
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# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_SDIO_DMA
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# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA Channl/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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* if we set aside more DMA channels/streams.
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*
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* SDIO DMA
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* DMAMAP_SDIO_1 = Channel 4, Stream 3
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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#endif /* __CONFIG_PHOTON_INCLUDE_BOARD_H */
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