Gregory Nutt 8bfdf70766 ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM		2013-07-30 13:20:33 -06:00
..
include	Add ARMv7-A irqdisable() inline function	2013-07-30 11:37:09 -06:00
src	ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM	2013-07-30 13:20:33 -06:00
Kconfig	Improve Cortex-A5 context switching so that a little less copying is done	2013-07-24 07:47:51 -06:00