fafecbf107
Fix nxstyle errors to pass CI Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
464 lines
14 KiB
C
464 lines
14 KiB
C
/****************************************************************************
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* arch/arm/src/kinetis/kinetis_pinirq.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/board/board.h>
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#include <nuttx/config.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include "arm_arch.h"
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#include "arm_internal.h"
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#include "kinetis.h"
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#include "hardware/kinetis_port.h"
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#ifdef CONFIG_KINETIS_GPIOIRQ
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* The Kinetis port interrupt logic is very flexible and will program
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* interrupts on most all pin events. In order to keep the memory usage to
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* a minimum, the NuttX port supports enabling interrupts on a per-port
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* basis.
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*/
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#if defined (CONFIG_KINETIS_PORTAINTS) || defined (CONFIG_KINETIS_PORTBINTS) || \
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defined (CONFIG_KINETIS_PORTCINTS) || defined (CONFIG_KINETIS_PORTDINTS) || \
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defined (CONFIG_KINETIS_PORTEINTS)
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# define HAVE_PORTINTS 1
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct kinetis_pinirq_s
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{
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xcpt_t handler;
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void *arg;
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Per pin port interrupt vectors. NOTE: Not all pins in each port
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* correspond to externally available GPIOs. However, I believe that the
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* Kinesis will support interrupts even if the pin is not available as
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* a GPIO. Hence, we need to support all 32 pins for each port. To keep the
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* memory usage at a minimum, the logic may be configure per port.
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*/
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#ifdef CONFIG_KINETIS_PORTAINTS
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static struct kinetis_pinirq_s g_portaisrs[32];
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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static struct kinetis_pinirq_s g_portbisrs[32];
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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static struct kinetis_pinirq_s g_portcisrs[32];
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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static struct kinetis_pinirq_s g_portdisrs[32];
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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static struct kinetis_pinirq_s g_porteisrs[32];
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: kinetis_portinterrupt
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*
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* Description:
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* Common port interrupt handling.
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*
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****************************************************************************/
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#ifdef HAVE_PORTINTS
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static int kinetis_portinterrupt(int irq, FAR void *context,
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uintptr_t addr,
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struct kinetis_pinirq_s *isrtab)
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{
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uint32_t isfr = getreg32(addr);
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int i;
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/* Examine each pin in the port */
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for (i = 0; i < 32 && isfr != 0; i++)
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{
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/* A bit set in the ISR means that an interrupt is pending for this
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* pin. If the pin is programmed for level sensitive inputs, then
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* the interrupt handling logic MUST disable the interrupt (or cause
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* the level to change) to prevent infinite interrupts.
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*/
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uint32_t bit = (1 << i);
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if ((isfr & bit) != 0)
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{
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/* I think that bits may be set in the ISFR for DMA activities
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* well. So, no error is declared if there is no registered
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* interrupt handler for the pin.
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*/
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if (isrtab[i].handler != NULL)
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{
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xcpt_t handler = isrtab[i].handler;
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void *arg = isrtab[i].arg;
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/* There is a registered interrupt handler... invoke it */
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handler(irq, context, arg);
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}
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/* Writing a one to the ISFR register will clear the pending
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* interrupt. If pin is configured to generate a DMA request
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* then the ISFR bit will be cleared automatically at the
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* completion of the requested DMA transfer. If configured for
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* a level sensitive interrupt and the pin remains asserted and
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* the bit will set again immediately after it is cleared.
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*/
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isfr &= ~bit;
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putreg32(bit, addr);
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}
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}
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return OK;
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}
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#endif
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/****************************************************************************
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* Name: kinetis_portXinterrupt
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*
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* Description:
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* Handle interrupts arriving on individual ports
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*
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****************************************************************************/
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#ifdef CONFIG_KINETIS_PORTAINTS
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static int kinetis_portainterrupt(int irq, FAR void *context, FAR void *arg)
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{
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return kinetis_portinterrupt(irq, context,
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KINETIS_PORTA_ISFR, g_portaisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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static int kinetis_portbinterrupt(int irq, FAR void *context, FAR void *arg)
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{
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return kinetis_portinterrupt(irq, context,
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KINETIS_PORTB_ISFR, g_portbisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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static int kinetis_portcinterrupt(int irq, FAR void *context, FAR void *arg)
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{
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return kinetis_portinterrupt(irq, context,
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KINETIS_PORTC_ISFR, g_portcisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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static int kinetis_portdinterrupt(int irq, FAR void *context, FAR void *arg)
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{
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return kinetis_portinterrupt(irq, context,
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KINETIS_PORTD_ISFR, g_portdisrs);
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}
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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static int kinetis_porteinterrupt(int irq, FAR void *context, FAR void *arg)
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{
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return kinetis_portinterrupt(irq, context,
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KINETIS_PORTE_ISFR, g_porteisrs);
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: kinetis_pinirqinitialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*
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****************************************************************************/
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void kinetis_pinirqinitialize(void)
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{
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#ifdef CONFIG_KINETIS_PORTAINTS
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irq_attach(KINETIS_IRQ_PORTA, kinetis_portainterrupt, NULL);
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putreg32(0xffffffff, KINETIS_PORTA_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTA);
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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irq_attach(KINETIS_IRQ_PORTB, kinetis_portbinterrupt, NULL);
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putreg32(0xffffffff, KINETIS_PORTB_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTB);
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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irq_attach(KINETIS_IRQ_PORTC, kinetis_portcinterrupt, NULL);
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putreg32(0xffffffff, KINETIS_PORTC_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTC);
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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irq_attach(KINETIS_IRQ_PORTD, kinetis_portdinterrupt, NULL);
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putreg32(0xffffffff, KINETIS_PORTD_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTD);
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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irq_attach(KINETIS_IRQ_PORTE, kinetis_porteinterrupt, NULL);
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putreg32(0xffffffff, KINETIS_PORTE_ISFR);
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up_enable_irq(KINETIS_IRQ_PORTE);
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#endif
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}
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/****************************************************************************
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* Name: kinetis_pinirqattach
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*
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* Description:
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* Attach a pin interrupt handler. The normal initialization sequence is:
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*
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* 1. Call kinetis_pinconfig() to configure the interrupting pin (pin
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* interrupts will be disabled.
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* 2. Call kinetis_pinirqattach() to attach the pin interrupt handling
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* function.
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* 3. Call kinetis_pinirqenable() to enable interrupts on the pin.
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*
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* Input Parameters:
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* pinset - Pin configuration
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* pinisr - Pin interrupt service routine
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* arg - An argument that will be provided to the interrupt service
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* routine.
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned on
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* any failure to indicate the nature of the failure.
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*
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****************************************************************************/
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int kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr, void *arg)
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{
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#ifdef HAVE_PORTINTS
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struct kinetis_pinirq_s *isrtab;
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irqstate_t flags;
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unsigned int port;
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unsigned int pin;
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/* It only makes sense to call this function for input pins that are
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* configured as interrupts.
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*/
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DEBUGASSERT((pinset & _PIN_INTDMA_MASK) == _PIN_INTERRUPT);
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DEBUGASSERT((pinset & _PIN_IO_MASK) == _PIN_INPUT);
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/* Get the port number and pin number */
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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/* Get the table associated with this port */
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DEBUGASSERT(port < KINETIS_NPORTS);
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flags = enter_critical_section();
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switch (port)
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{
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#ifdef CONFIG_KINETIS_PORTAINTS
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case KINETIS_PORTA :
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isrtab = g_portaisrs;
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break;
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#endif
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#ifdef CONFIG_KINETIS_PORTBINTS
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case KINETIS_PORTB :
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isrtab = g_portbisrs;
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break;
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#endif
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#ifdef CONFIG_KINETIS_PORTCINTS
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case KINETIS_PORTC :
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isrtab = g_portcisrs;
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break;
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#endif
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#ifdef CONFIG_KINETIS_PORTDINTS
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case KINETIS_PORTD :
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isrtab = g_portdisrs;
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break;
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#endif
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#ifdef CONFIG_KINETIS_PORTEINTS
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case KINETIS_PORTE :
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isrtab = g_porteisrs;
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break;
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#endif
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default:
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leave_critical_section(flags);
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return -EINVAL;
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}
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/* Get the old PIN ISR and set the new PIN ISR */
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isrtab[pin].handler = pinisr;
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isrtab[pin].arg = arg;
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/* And return the old PIN isr address */
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leave_critical_section(flags);
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return OK;
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#else
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return -ENOSYS;
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#endif /* HAVE_PORTINTS */
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}
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/****************************************************************************
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* Name: kinetis_pinirqenable
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*
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* Description:
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* Enable the interrupt for specified pin IRQ
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*
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****************************************************************************/
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void kinetis_pinirqenable(uint32_t pinset)
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{
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#ifdef HAVE_PORTINTS
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uintptr_t base;
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uint32_t regval;
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unsigned int port;
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unsigned int pin;
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/* Get the port number and pin number */
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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DEBUGASSERT(port < KINETIS_NPORTS);
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if (port < KINETIS_NPORTS)
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{
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/* Get the base address of PORT block for this port */
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base = KINETIS_PORT_BASE(port);
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/* Modify the IRQC field of the port PCR register in order to enable
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* the interrupt.
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*/
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regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
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regval &= ~PORT_PCR_IRQC_MASK;
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switch (pinset & _PIN_INT_MASK)
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{
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case PIN_INT_ZERO : /* Interrupt when logic zero */
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regval |= PORT_PCR_IRQC_ZERO;
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break;
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case PIN_INT_RISING : /* Interrupt on rising edge */
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regval |= PORT_PCR_IRQC_RISING;
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break;
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case PIN_INT_FALLING : /* Interrupt on falling edge */
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regval |= PORT_PCR_IRQC_FALLING;
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break;
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case PIN_INT_BOTH : /* Interrupt on either edge */
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regval |= PORT_PCR_IRQC_BOTH;
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break;
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case PIN_INT_ONE : /* Interrupt when logic one */
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regval |= PORT_PCR_IRQC_ONE;
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break;
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case PIN_DMA_RISING : /* DMA on rising edge */
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regval |= PORT_PCR_IRQC_DMARISING;
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break;
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case PIN_DMA_FALLING : /* DMA on falling edge */
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regval |= PORT_PCR_IRQC_DMAFALLING;
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break;
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case PIN_DMA_BOTH : /* DMA on either edge */
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regval |= PORT_PCR_IRQC_DMABOTH;
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break;
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default:
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return;
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}
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putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
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}
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#endif /* HAVE_PORTINTS */
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}
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/****************************************************************************
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* Name: kinetis_pinirqdisable
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*
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* Description:
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* Disable the interrupt for specified pin
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*
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****************************************************************************/
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void kinetis_pinirqdisable(uint32_t pinset)
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{
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#ifdef HAVE_PORTINTS
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uintptr_t base;
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uint32_t regval;
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unsigned int port;
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unsigned int pin;
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/* Get the port number and pin number */
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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DEBUGASSERT(port < KINETIS_NPORTS);
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if (port < KINETIS_NPORTS)
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{
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/* Get the base address of PORT block for this port */
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base = KINETIS_PORT_BASE(port);
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/* Clear the IRQC field of the port PCR register in order to disable
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* the interrupt.
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*/
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regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
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regval &= ~PORT_PCR_IRQC_MASK;
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putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
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}
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#endif /* HAVE_PORTINTS */
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}
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#endif /* CONFIG_KINETIS_GPIOIRQ */
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