226 lines
6.1 KiB
ReStructuredText
226 lines
6.1 KiB
ReStructuredText
==========
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ST STM32F3
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==========
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Supported MCUs
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==============
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TODO
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Peripheral Support
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==================
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The following list indicates peripherals supported in NuttX:
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========== ======= =====
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Peripheral Support Notes
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========== ======= =====
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FLASH Yes
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CRC Yes
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PM ?
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RCC Yes
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GPIO Yes
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SYSCFG Yes
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DMA Yes
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EXTI Yes
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ADC Yes
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SDADC Yes
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DAC Yes
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COMP Yes
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OPAMP Yes
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TSC No
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TIM Yes
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HRTIM Yes
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IRTIM No
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IWDG ?
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WWDG ?
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RTC Yes
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I2C Yes
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USART Yes
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SPI Yes
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I2S ?
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CAN Yes
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USB Yes
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HDMI-CEC No
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========== ======= =====
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Memory
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------
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- CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case)
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- CONFIG_RAM_START - The start address of installed DRAM
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- CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
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- CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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stack. If defined, this symbol is the size of the interrupt
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stack in bytes. If not defined, the user task stacks will be
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used during interrupt handling.
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- CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
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Clock
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-----
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- CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
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configuration features.::
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CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
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- CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
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of delay loops
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Timers
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------
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
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is defined (as above) then the following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation, ADC conversion,
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or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
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to assign the timer (n) for used by the ADC or DAC, but then you also have to
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configure which ADC or DAC (m) it is assigned to.
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- CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
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- CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
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- CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
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- CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
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- CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
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For each timer that is enabled for PWM usage, we need the following additional
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configuration settings:
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- CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
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NOTE: The STM32 timers are each capable of generating different signals on
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each of the four channels with different duty cycles. That capability is
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not supported by this driver: Only one output channel per timer.
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JTAG
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----
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JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
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- CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
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- CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
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but without JNTRST.
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- CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
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USART
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-----
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Options:
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- CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UARTm (m=4,5)
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for the console and ttys0 (default is the USART1).
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- CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
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This specific the size of the receive buffer
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- CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
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being sent. This specific the size of the transmit buffer
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- CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
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- CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
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- CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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- CONFIG_U[S]ARTn_2STOP - Two stop bits
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CAN character device
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--------------------
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- CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
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CONFIG_STM32_CAN2 must also be defined)
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- CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
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Standard 11-bit IDs.
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- CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
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Default: 8
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- CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
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Default: 4
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- CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
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mode for testing. The STM32 CAN driver does support loopback mode.
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- CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
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is defined.
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- CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
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is defined.
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- CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
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Default: 6
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- CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
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Default: 7
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- CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
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dump of all CAN registers.
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CAN SocketCAN
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-------------
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TODO
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SPI
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---
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- CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
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support. Non-interrupt-driven, poll-waiting is recommended if the
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interrupt rate would be to high in the interrupt driven case.
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- CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
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Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
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USB FS
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------
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TODO
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FPU
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===
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FPU Configuration Options
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-------------------------
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There are two version of the FPU support built into the STM32 port.
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1. Non-Lazy Floating Point Register Save
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In this configuration floating point register save and restore is
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implemented on interrupt entry and return, respectively. In this
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case, you may use floating point operations for interrupt handling
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logic if necessary. This FPU behavior logic is enabled by default
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with::
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CONFIG_ARCH_FPU=y
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2. Lazy Floating Point Register Save.
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An alternative mplementation only saves and restores FPU registers only
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on context switches. This means: (1) floating point registers are not
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stored on each context switch and, hence, possibly better interrupt
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performance. But, (2) since floating point registers are not saved,
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you cannot use floating point operations within interrupt handlers.
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This logic can be enabled by simply adding the following to your .config
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file::
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CONFIG_ARCH_FPU=y
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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