e6553eee5a
port optimized string functions for x86_64 from Bionic (BSD licensed) Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
50 lines
2.4 KiB
C
50 lines
2.4 KiB
C
/*********************************************************************************
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* libs/libc/machine/x86_64/gnu/cache.h
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*
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* Copyright (c) 2014, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice,
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* * this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* * this list of conditions and the following disclaimer in the documentation
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* * and/or other materials provided with the distribution.
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*
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* * Neither the name of Intel Corporation nor the names of its contributors
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* * may be used to endorse or promote products derived from this software
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* * without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*********************************************************************************/
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#ifndef __LIBS_LIBC_MACHINE_X86_64_GNU_CACHE_H
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#define __LIBS_LIBC_MACHINE_X86_64_GNU_CACHE_H
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/*********************************************************************************
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* Pre-processor Definitions
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*********************************************************************************/
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/* Values are optimized for Core Architecture */
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#define SHARED_CACHE_SIZE (4096 * 1024) /* Core Architecture L2 Cache */
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#define DATA_CACHE_SIZE (24 * 1024) /* Core Architecture L1 Data Cache */
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#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
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#define DATA_CACHE_SIZE_HALF (DATA_CACHE_SIZE / 2)
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#endif /* __LIBS_LIBC_MACHINE_X86_64_GNU_CACHE_H */
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