149 lines
5.1 KiB
Plaintext
149 lines
5.1 KiB
Plaintext
/****************************************************************************
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* boards/arm/stm32f7/nucleo-144/scripts/f746-flash.ld
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* The STM32F746ZGT6 has 1024 KiB of main FLASH memory. This FLASH memory
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* can be accessed from either the AXIM interface at address 0x0800:0000 or
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* from the ITCM interface at address 0x0020:0000.
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*
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* Additional information, including the option bytes, is available at at
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* FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
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*
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* In the STM32F746ZGT6, two different boot spaces can be selected through
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* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
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* BOOT_ADD1 option bytes:
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*
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* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
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* ST programmed value: Flash on ITCM at 0x0020:0000
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* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
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* ST programmed value: System bootloader at 0x0010:0000
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*
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* NuttX does not modify these option bytes. On the unmodified NUCLEO-144
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* board, the BOOT0 pin is at ground so by default, the STM32F746ZGT6 will
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* boot from address 0x0020:0000 in ITCM FLASH.
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*
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* The STM32F746ZGT6 also has 320 KiB of data SRAM (in addition to ITCM SRAM).
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* SRAM is split up into three blocks:
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*
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* 1) 64 KiB of DTCM SRM beginning at address 0x2000:0000
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* 2) 240 KiB of SRAM1 beginning at address 0x2001:0000
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* 3) 16 KiB of SRAM2 beginning at address 0x2004:c000
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*
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* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
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* where the code expects to begin execution by jumping to the entry point in
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* the 0x0800:0000 address range.
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*/
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MEMORY
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{
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itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
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flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
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sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K
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sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
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}
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OUTPUT_ARCH(arm)
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EXTERN(_vectors)
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ENTRY(_stext)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > flash
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.init_section : {
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab : {
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*(.ARM.extab*)
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} > flash
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__exidx_start = ABSOLUTE(.);
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.ARM.exidx : {
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*(.ARM.exidx*)
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} > flash
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__exidx_end = ABSOLUTE(.);
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_eronly = ABSOLUTE(.);
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram1 AT > flash
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.bss : {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram1
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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