Ivan Ucherdzhiev 910e7a3899 arch/arm/src/imxrt/imxrt_lpsrtc.c: SVNC LPCR register bits 0 & 1 are NOT reserved and are, in fact, needed to enabled the SRTC. Now the SRTC is working.

2018-09-26 10:13:20 -06:00

..

include

Merged in raiden00/nuttx_h7 (pull request #720)

2018-09-16 15:58:25 +00:00

src

arch/arm/src/imxrt/imxrt_lpsrtc.c: SVNC LPCR register bits 0 & 1 are NOT reserved and are, in fact, needed to enabled the SRTC. Now the SRTC is working.

2018-09-26 10:13:20 -06:00

Kconfig

arch/arm/src/armv7-m/up_trigger_irq.c: Add logic to trigger ARMv7-M interrupts and exceptions.

2018-08-25 10:23:21 -06:00