248 lines
7.2 KiB
C
248 lines
7.2 KiB
C
/****************************************************************************
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* arch/arm/src/stm32/stm32_rcc.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <assert.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "chip.h"
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#include "stm32_gpio.h"
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#include "stm32_rcc.h"
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#include "stm32_rtc.h"
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#include "stm32_flash.h"
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#include "stm32.h"
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#include "stm32_waste.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Allow up to 100 milliseconds for the high speed clock to become ready.
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* that is a very long delay, but if the clock does not become ready we are
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* hosed anyway.
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*/
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#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC)
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/* Include chip-specific clocking initialization logic */
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#if defined(CONFIG_STM32_STM32L15XX)
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# include "stm32l15xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32F10XX)
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# include "stm32f10xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32F20XX)
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# include "stm32f20xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32F30XX)
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# include "stm32f30xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32F33XX)
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# include "stm32f33xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32F37XX)
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# include "stm32f37xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32F4XXX)
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# include "stm32f40xxx_rcc.c"
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#elif defined(CONFIG_STM32_STM32G4XXX)
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# include "stm32g4xxxx_rcc.c"
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#else
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# error "Unsupported STM32 chip"
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_STM32_STM32L15XX)
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# define STM32_RCC_XXX STM32_RCC_CSR
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# define RCC_XXX_YYYRST RCC_CSR_RTCRST
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#else
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# define STM32_RCC_XXX STM32_RCC_BDCR
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# define RCC_XXX_YYYRST RCC_BDCR_BDRST
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: rcc_resetbkp
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*
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* Description:
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* The RTC needs to reset the Backup Domain to change RTCSEL and resetting
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* the Backup Domain renders to disabling the LSE as consequence.
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* In order to avoid resetting the Backup Domain when we already
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* configured LSE we will reset the Backup Domain early (here).
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#if defined(CONFIG_STM32_RTC) && defined(CONFIG_STM32_PWR) && !defined(CONFIG_STM32_STM32F10XX)
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static inline void rcc_resetbkp(void)
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{
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uint32_t regval;
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/* Check if the RTC is already configured */
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stm32_pwr_initbkp(false);
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regval = getreg32(RTC_MAGIC_REG);
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if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
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{
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stm32_pwr_enablebkp(true);
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/* We might be changing RTCSEL - to ensure such changes work, we must
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* reset the backup domain (having backed up the RTC_MAGIC token)
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*/
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modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
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modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
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stm32_pwr_enablebkp(false);
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}
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}
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#else
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# define rcc_resetbkp()
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_clockconfig
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*
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* Description:
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* Called to establish the clock settings based on the values in board.h.
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* This function (by default) will reset most everything, enable the PLL,
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* and enable peripheral clocking for all peripherals enabled in the NuttX
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* configuration file.
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*
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* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking
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* will be enabled by an externally provided, board-specific function
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* called stm32_board_clockconfig().
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_clockconfig(void)
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{
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/* Make sure that we are starting in the reset state */
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rcc_reset();
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/* Reset backup domain if appropriate */
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rcc_resetbkp();
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#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
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/* Invoke Board Custom Clock Configuration */
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stm32_board_clockconfig();
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#else
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/* Invoke standard, fixed clock configuration based on definitions
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* in board.h
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*/
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stm32_stdclockconfig();
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#endif
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/* Enable peripheral clocking */
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rcc_enableperipherals();
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#ifdef CONFIG_STM32_SYSCFG_IOCOMPENSATION
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/* Enable I/O Compensation */
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stm32_iocompensation();
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#endif
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}
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/****************************************************************************
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* Name: stm32_clockenable
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*
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* Description:
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* Re-enable the clock and restore the clock settings based on settings
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* in board.h. This function is only available to support low-power
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* modes of operation: When re-awakening from deep-sleep modes, it is
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* necessary to re-enable/re-start the PLL
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*
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* This functional performs a subset of the operations performed by
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* stm32_clockconfig(): It does not reset any devices, and it does not
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* reset the currently enabled peripheral clocks.
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*
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* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking
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* will be enabled by an externally provided, board-specific function
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* called stm32_board_clockconfig().
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_PM
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void stm32_clockenable(void)
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{
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#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
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/* Invoke Board Custom Clock Configuration */
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stm32_board_clockconfig();
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#else
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/* Invoke standard, fixed clock configuration based on definitions
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* in board.h
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*/
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stm32_stdclockconfig();
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#endif
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}
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#endif
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