36df84c843
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
120 lines
6.5 KiB
C
120 lines
6.5 KiB
C
/************************************************************************************
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* arch/arm/src/imx/imx_aitc.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_IMX_AITC_H
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#define __ARCH_ARM_IMX_AITC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* AITC Register Offsets ************************************************************/
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#define AITC_INTCNTL_OFFSET 0x0000 /* Interrupt Control Register */
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#define AITC_NIMASK_OFFSET 0x0004 /* Normal Interrupt Mask Register */
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#define AITC_INTENNUM_OFFSET 0x0008 /* Interrupt Enable Number Register */
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#define AITC_INTDISNUM_OFFSET 0x000c /* Interrupt Disable Number Register */
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#define AITC_INTENABLEH_OFFSET 0x0010 /* Interrupt Enable Register High */
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#define AITC_INTENABLEL_OFFSET 0x0014 /* Interrupt Enable Register Low */
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#define AITC_INTTYPEH_OFFSET 0x0018
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#define AITC_INTTYPEL_OFFSET 0x001c
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#define AITC_NIPRIORITY7_OFFSET 0x0020
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#define AITC_NIPRIORITY6_OFFSET 0x0024
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#define AITC_NIPRIORITY5_OFFSET 0x0028
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#define AITC_NIPRIORITY4_OFFSET 0x002c
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#define AITC_NIPRIORITY3_OFFSET 0x0030
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#define AITC_NIPRIORITY2_OFFSET 0x0034
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#define AITC_NIPRIORITY1_OFFSET 0x0038
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#define AITC_NIPRIORITY0_OFFSET 0x003c
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#define AITC_NIPRIORITY_OFFSET(n) (AITC_NIPRIORITY7_OFFSET + 4*(7-(n)))
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#define AITC_NIVECSR_OFFSET 0x0040
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#define AITC_FIVECSR_OFFSET 0x0044
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#define AITC_INTSRCH_OFFSET 0x0048
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#define AITC_INTSRCL_OFFSET 0x004c
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#define AITC_INTFRCH_OFFSET 0x0050
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#define AITC_INTFRCL_OFFSET 0x0054
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#define AITC_NIPNDH_OFFSET 0x0058
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#define AITC_NIPNDL_OFFSET 0x005c
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#define AITC_FIPNDH_OFFSET 0x0060
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#define AITC_FIPNDL_OFFSET 0x0064
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/* AITC Register Addresses **********************************************************/
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#define IMX_AITC_INTCNTL (IMX_AITC_VBASE + AITC_INTCNTL_OFFSET)
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#define IMX_AITC_NIMASK (IMX_AITC_VBASE + AITC_NIMASK_OFFSET)
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#define IMX_AITC_INTENNUM (IMX_AITC_VBASE + AITC_INTENNUM_OFFSET)
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#define IMX_AITC_INTDISNUM (IMX_AITC_VBASE + AITC_INTDISNUM_OFFSET)
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#define IMX_AITC_INTENABLEH (IMX_AITC_VBASE + AITC_INTENABLEH_OFFSET)
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#define IMX_AITC_INTENABLEL (IMX_AITC_VBASE + AITC_INTENABLEL_OFFSET)
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#define IMX_AITC_INTTYPEH (IMX_AITC_VBASE + AITC_INTTYPEH_OFFSET)
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#define IMX_AITC_INTTYPEL (IMX_AITC_VBASE + AITC_INTTYPEL_OFFSET)
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#define IMX_AITC_NIPRIORITY7 (IMX_AITC_VBASE + AITC_NIPRIORITY7_OFFSET)
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#define IMX_AITC_NIPRIORITY6 (IMX_AITC_VBASE + AITC_NIPRIORITY6_OFFSET)
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#define IMX_AITC_NIPRIORITY5 (IMX_AITC_VBASE + AITC_NIPRIORITY5_OFFSET)
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#define IMX_AITC_NIPRIORITY4 (IMX_AITC_VBASE + AITC_NIPRIORITY4_OFFSET)
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#define IMX_AITC_NIPRIORITY3 (IMX_AITC_VBASE + AITC_NIPRIORITY3_OFFSET)
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#define IMX_AITC_NIPRIORITY2 (IMX_AITC_VBASE + AITC_NIPRIORITY2_OFFSET)
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#define IMX_AITC_NIPRIORITY1 (IMX_AITC_VBASE + AITC_NIPRIORITY1_OFFSET)
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#define IMX_AITC_NIPRIORITY0 (IMX_AITC_VBASE + AITC_NIPRIORITY0_OFFSET)
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#define IMX_AITC_NIPRIORITY(n) (IMX_AITC_VBASE + AITC_NIPRIORITY_OFFSET(n)))
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#define IMX_AITC_NIVECSR (IMX_AITC_VBASE + AITC_NIVECSR_OFFSET)
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#define IMX_AITC_FIVECSR (IMX_AITC_VBASE + AITC_FIVECSR_OFFSET)
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#define IMX_AITC_INTSRCH (IMX_AITC_VBASE + AITC_INTSRCH_OFFSET)
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#define IMX_AITC_INTSRCL (IMX_AITC_VBASE + AITC_INTSRCL_OFFSET)
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#define IMX_AITC_INTFRCH (IMX_AITC_VBASE + AITC_INTFRCH_OFFSET)
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#define IMX_AITC_INTFRCL (IMX_AITC_VBASE + AITC_INTFRCL_OFFSET)
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#define IMX_AITC_NIPNDH (IMX_AITC_VBASE + AITC_NIPNDH_OFFSET)
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#define IMX_AITC_NIPNDL (IMX_AITC_VBASE + AITC_NIPNDL_OFFSET)
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#define IMX_AITC_FIPNDH (IMX_AITC_VBASE + AITC_FIPNDH_OFFSET)
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#define IMX_AITC_FIPNDL (IMX_AITC_VBASE + AITC_FIPNDL_OFFSET)
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/* AITC Register Bit Definitions ****************************************************/
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#define AITC_NIVECSR_NIPRILVL_SHIFT 0 /* Bits 15<31>0: Priority of highest priority interrupt */
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#define AITC_NIVECSR_NIPRILVL_MASK (0x0000ffff << AITC_NIVECSR_NIPRILVL_SHIFT);
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#define AITC_NIVECSR_NIVECTOR_SHIFT 16 /* Bits 31<33>16: Vector index of highest priority interrupt */
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#define AITC_NIVECSR_NIVECTOR_MASK (0x0000ffff << AITC_NIVECSR_NIVECTOR_SHIFT);
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_IMX_AITC_H */
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