667290b144
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4380 42af7a65-404d-4744-a932-0658087f49c3
226 lines
8.3 KiB
C
226 lines
8.3 KiB
C
/************************************************************************************
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* arch/arm/src/imx/imx_boot.c
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* arch/arm/src/chip/imx_boot.c
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*
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* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include "chip.h"
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#include "up_internal.h"
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#include "up_arch.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/************************************************************************************
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* Private Types
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************************************************************************************/
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struct section_mapping_s
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{
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uint32_t physbase; /* Physical address of the region to be mapped */
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uint32_t virtbase; /* Virtual address of the region to be mapped */
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uint32_t mmuflags; /* MMU settings for the region (e.g., cache-able) */
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uint32_t nsections; /* Number of mappings in the region */
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};
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/************************************************************************************
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* Public Variables
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************************************************************************************/
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extern uint32_t _vector_start; /* Beginning of vector block */
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extern uint32_t _vector_end; /* End+1 of vector block */
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/************************************************************************************
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* Private Variables
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************************************************************************************/
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/* Mapping of the external memory regions will probably have to be made board
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* specific.
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*/
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static const struct section_mapping_s section_mapping[] =
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{
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{ IMX_PERIPHERALS_PSECTION, IMX_PERIPHERALS_VSECTION,
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IMX_PERIPHERALS_MMUFLAGS, IMX_PERIPHERALS_NSECTIONS},
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{ IMX_FLASH_PSECTION, IMX_FLASH_VSECTION,
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IMX_FLASH_MMUFLAGS, IMX_FLASH_NSECTIONS},
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{ IMX_CS1_PSECTION, IMX_CS1_VSECTION,
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IMX_PERIPHERALS_MMUFLAGS, IMX_CS1_NSECTIONS},
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{ IMX_CS2_PSECTION, IMX_CS2_VSECTION,
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IMX_PERIPHERALS_MMUFLAGS, IMX_CS2_NSECTIONS},
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{ IMX_CS3_PSECTION, IMX_CS3_VSECTION,
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IMX_PERIPHERALS_MMUFLAGS, IMX_CS3_NSECTIONS},
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{ IMX_CS4_PSECTION, IMX_CS4_VSECTION,
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IMX_PERIPHERALS_MMUFLAGS, IMX_CS4_NSECTIONS},
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{ IMX_CS5_PSECTION, IMX_CS5_VSECTION,
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IMX_PERIPHERALS_MMUFLAGS, IMX_CS5_NSECTIONS},
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};
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#define NMAPPINGS (sizeof(section_mapping) / sizeof(struct section_mapping_s))
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/* All i.MX architectures must provide the following entry point. This entry point
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* is called early in the intitialization -- after all memory has been configured
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* and mapped but before any devices have been initialized.
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*/
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extern void imx_boardinitialize(void);
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: up_setlevel1entry
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************************************************************************************/
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static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
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{
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uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
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uint32_t index = vaddr >> 20;
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/* Save the page table entry */
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pgtable[index] = (paddr | mmuflags);
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}
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/************************************************************************************
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* Name: up_setupmappings
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************************************************************************************/
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static void up_setupmappings(void)
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{
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int i, j;
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for (i = 0; i < NMAPPINGS; i++)
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{
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uint32_t sect_paddr = section_mapping[i].physbase;
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uint32_t sect_vaddr = section_mapping[i].virtbase;
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uint32_t mmuflags = section_mapping[i].mmuflags;
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for (j = 0; j < section_mapping[i].nsections; j++)
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{
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up_setlevel1entry(sect_paddr, sect_vaddr, mmuflags);
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sect_paddr += SECTION_SIZE;
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sect_vaddr += SECTION_SIZE;
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}
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}
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}
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/************************************************************************************
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* Name: up_copyvectorblock
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************************************************************************************/
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static void up_copyvectorblock(void)
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{
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/* There are three operational memory configurations:
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*
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* 1. We execute in place in FLASH (CONFIG_BOOT_RUNFROMFLASH=y). In this case:
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*
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* - Our vectors must be located at the beginning of FLASH and will
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* also be mapped to address zero (because of the i.MX's "double map image."
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* - There is nothing to be done here in this case.
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*
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* 2. We boot in FLASH but copy ourselves to DRAM from better performance.
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* (CONFIG_BOOT_RUNFROMFLASH=n && CONFIG_BOOT_COPYTORAM=y). In this case:
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*
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* - Our code image is in FLASH and we boot to FLASH initially, then copy
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* ourself to DRAM, and
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* - DRAM will be mapped to address zero.
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* - There is nothing to be done here in this case.
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*
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* 3. There is bootloader that copies us to DRAM, but probably not to the beginning
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* of DRAM (say to 0x0900:0000) (CONFIG_BOOT_RUNFROMFLASH=n && CONFIG_BOOT_COPYTORAM=n).
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* In this case:
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*
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* - DRAM will be mapped to address zero.
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* - Interrupt vectors will be copied to address zero in this function.
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*/
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#if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM)
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uint32_t *src = (uint32_t*)&_vector_start;
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uint32_t *end = (uint32_t*)&_vector_end;
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uint32_t *dest = (uint32_t*)VECTOR_BASE;
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while (src < end)
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{
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*dest++ = *src++;
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}
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#endif
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}
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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void up_boot(void)
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{
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/* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
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* IO regions (Including the vector region).
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*/
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up_setupmappings();
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/* Setup up vector block. _vector_start and _vector_end are exported from
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* up_vector.S
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*/
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up_copyvectorblock();
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/* Perform board-specific initialiation */
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imx_boardinitialize();
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/* Set up the board-specific LEDs */
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#ifdef CONFIG_ARCH_LEDS
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up_ledinit();
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#endif
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/* Perform early serial initialization */
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#ifdef USE_EARLYSERIALINIT
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up_earlyserialinit();
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#endif
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}
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