422 lines
14 KiB
C
422 lines
14 KiB
C
/****************************************************************************
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* arch/arm/src/lpc17xx_40xx/lpc17_40_lowputc.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "hardware/lpc17_40_syscon.h"
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#include "hardware/lpc17_40_uart.h"
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#include "lpc17_40_gpio.h"
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#include "lpc17_40_lowputc.h"
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#include "lpc17_40_serial.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Select UART parameters for the selected console */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE LPC17_40_UART0_BASE
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# define CONSOLE_BAUD CONFIG_UART0_BAUD
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# define CONSOLE_BITS CONFIG_UART0_BITS
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# define CONSOLE_PARITY CONFIG_UART0_PARITY
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# define CONSOLE_2STOP CONFIG_UART0_2STOP
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE LPC17_40_UART1_BASE
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# define CONSOLE_BAUD CONFIG_UART1_BAUD
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# define CONSOLE_BITS CONFIG_UART1_BITS
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# define CONSOLE_PARITY CONFIG_UART1_PARITY
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# define CONSOLE_2STOP CONFIG_UART1_2STOP
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_BASE LPC17_40_UART2_BASE
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# define CONSOLE_BAUD CONFIG_UART2_BAUD
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# define CONSOLE_BITS CONFIG_UART2_BITS
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# define CONSOLE_PARITY CONFIG_UART2_PARITY
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# define CONSOLE_2STOP CONFIG_UART2_2STOP
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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# define CONSOLE_BASE LPC17_40_UART3_BASE
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# define CONSOLE_BAUD CONFIG_UART3_BAUD
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# define CONSOLE_BITS CONFIG_UART3_BITS
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# define CONSOLE_PARITY CONFIG_UART3_PARITY
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# define CONSOLE_2STOP CONFIG_UART3_2STOP
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#else
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# if defined(HAVE_CONSOLE)
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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# endif
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# define CONSOLE_BASE LPC17_40_UART0_BASE
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# define CONSOLE_BAUD 115200
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# define CONSOLE_BITS 8
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# define CONSOLE_PARITY 0
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# define CONSOLE_2STOP 0
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#endif
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/* Get word length setting for the console */
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#if CONSOLE_BITS == 5
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# define CONSOLE_LCR_WLS UART_LCR_WLS_5BIT
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#elif CONSOLE_BITS == 6
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# define CONSOLE_LCR_WLS UART_LCR_WLS_6BIT
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#elif CONSOLE_BITS == 7
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# define CONSOLE_LCR_WLS UART_LCR_WLS_7BIT
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#elif CONSOLE_BITS == 8
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# define CONSOLE_LCR_WLS UART_LCR_WLS_8BIT
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#elif defined(HAVE_CONSOLE)
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# error "Invalid CONFIG_UARTn_BITS setting for console"
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#endif
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/* Get parity setting for the console */
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#if CONSOLE_PARITY == 0
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# define CONSOLE_LCR_PAR 0
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#elif CONSOLE_PARITY == 1
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# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_ODD)
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#elif CONSOLE_PARITY == 2
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# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_EVEN)
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#elif CONSOLE_PARITY == 3
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# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK1)
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#elif CONSOLE_PARITY == 4
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# define CONSOLE_LCR_PAR (UART_LCR_PE|UART_LCR_PS_STICK0)
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#elif defined(HAVE_CONSOLE)
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# error "Invalid CONFIG_UARTn_PARITY setting for CONSOLE"
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#endif
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/* Get stop-bit setting for the console and UART0-3 */
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#if CONSOLE_2STOP != 0
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# define CONSOLE_LCR_STOP UART_LCR_STOP
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#else
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# define CONSOLE_LCR_STOP 0
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#endif
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/* LCR and FCR values for the console */
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#define CONSOLE_LCR_VALUE (CONSOLE_LCR_WLS | CONSOLE_LCR_PAR | CONSOLE_LCR_STOP)
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#define CONSOLE_FCR_VALUE (UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST |\
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UART_FCR_RXRST | UART_FCR_FIFOEN)
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/* Select a CCLK divider to produce the UART PCLK. The strategy is to select
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* the smallest divisor that results in an solution within range of the
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* 16-bit DLM and DLL divisor:
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*
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* BAUD = PCLK / (16 * DL), or
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* DL = PCLK / BAUD / 16
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*
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* Where for the LPC176x the PCLK is determined by the UART-specific
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* divisor in PCLKSEL0 or PCLKSEL1:
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*
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* PCLK = CCLK / divisor
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*
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* And for the LPC178x/40xx, the PCLK is determined by the global divisor
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* setting in the PLKSEL register.
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*
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*/
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#ifdef LPC178x_40xx
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/* Use the global PCLK frequency */
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# define CONSOLE_NUMERATOR BOARD_PCLK_FREQUENCY
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#else
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# ifdef CONFIG_LPC17_40_UART_USE_FRACTIONAL_DIVIDER
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# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK
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# define CONSOLE_NUMERATOR (LPC17_40_CCLK)
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# else
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/* Calculate and optimal PCLKSEL0/1 divisor.
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* First, check divisor == 1. This works if the upper limit is met:
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*
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* DL < 0xffff, or
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* PCLK / BAUD / 16 < 0xffff, or
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* CCLK / BAUD / 16 < 0xffff, or
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* CCLK < BAUD * 0xffff * 16
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* BAUD > CCLK / 0xffff / 16
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*
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* And the lower limit is met (we can't allow DL to get very close to one).
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*
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* DL >= MinDL
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* CCLK / BAUD / 16 >= MinDL, or
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* BAUD <= CCLK / 16 / MinDL
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*/
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# if CONSOLE_BAUD < (LPC17_40_CCLK / 16 / UART_MINDL)
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# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK
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# define CONSOLE_NUMERATOR (LPC17_40_CCLK)
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/* Check divisor == 2. This works if:
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*
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* 2 * CCLK / BAUD / 16 < 0xffff, or
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* BAUD > CCLK / 0xffff / 8
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*
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* And
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*
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* 2 * CCLK / BAUD / 16 >= MinDL, or
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* BAUD <= CCLK / 8 / MinDL
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*/
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# elif CONSOLE_BAUD < (LPC17_40_CCLK / 8 / UART_MINDL)
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# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK2
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# define CONSOLE_NUMERATOR (LPC17_40_CCLK / 2)
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/* Check divisor == 4. This works if:
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*
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* 4 * CCLK / BAUD / 16 < 0xffff, or
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* BAUD > CCLK / 0xffff / 4
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*
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* And
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*
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* 4 * CCLK / BAUD / 16 >= MinDL, or
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* BAUD <= CCLK / 4 / MinDL
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*/
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# elif CONSOLE_BAUD < (LPC17_40_CCLK / 4 / UART_MINDL)
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# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK4
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# define CONSOLE_NUMERATOR (LPC17_40_CCLK / 4)
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/* Check divisor == 8. This works if:
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*
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* 8 * CCLK / BAUD / 16 < 0xffff, or
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* BAUD > CCLK / 0xffff / 2
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*
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* And
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*
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* 8 * CCLK / BAUD / 16 >= MinDL, or
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* BAUD <= CCLK / 2 / MinDL
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*/
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# else /* if CONSOLE_BAUD < (LPC17_40_CCLK / 2 / UART_MINDL) */
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# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK8
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# define CONSOLE_NUMERATOR (LPC17_40_CCLK / 8)
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# endif
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# endif
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#endif /* LPC178x_40xx */
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/* Then this is the value to use for the DLM and DLL registers */
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#define CONSOLE_DL (CONSOLE_NUMERATOR / (CONSOLE_BAUD << 4))
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_lowputc
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*
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* Description:
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* Output one byte on the serial console
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*
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****************************************************************************/
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void arm_lowputc(char ch)
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{
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#if defined HAVE_UART && defined HAVE_CONSOLE
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/* Wait for the transmitter to be available */
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while ((getreg32(CONSOLE_BASE + LPC17_40_UART_LSR_OFFSET) &
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UART_LSR_THRE) == 0);
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/* Send the character */
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putreg32((uint32_t)ch, CONSOLE_BASE + LPC17_40_UART_THR_OFFSET);
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#endif
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}
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/****************************************************************************
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* Name: lpc17_40_lowsetup
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*
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* Description:
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* This performs basic initialization of the UART used for the serial
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* console. Its purpose is to get the console output available as soon
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* as possible.
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*
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* The UART0/1/2/3 peripherals are configured using the following
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* registers:
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* 1. Power: In the PCONP register, set bits PCUART0/1/2/3.
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* On reset, UART0 and UART 1 are enabled (PCUART0 = 1 and PCUART1 = 1)
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* and UART2/3 are disabled (PCUART1 = 0 and PCUART3 = 0).
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* 2. Peripheral clock: In the PCLKSEL0 register, select PCLK_UART0 and
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* PCLK_UART1; in the PCLKSEL1 register,
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* select PCLK_UART2 and PCLK_UART3.
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* 3. Baud rate: In the LCR register, set bit DLAB = 1. This enables access
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* to registers DLL and DLM for setting the baud rate. Also, if needed,
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* set the fractional baud rate in the fractional divider.
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* 4. UART FIFO: Use bit FIFO enable (bit 0) in FCR register to
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* enable FIFO.
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* 5. Pins: Select UART pins through the PINSEL registers and pin modes
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* through the PINMODE registers. UART receive pins should not have
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* pull-down resistors enabled.
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* 6. Interrupts: To enable UART interrupts set bit DLAB = 0 in the LCRF
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* register. This enables access to IER. Interrupts are enabled
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* in the NVIC using the appropriate Interrupt Set Enable register.
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* 7. DMA: UART transmit and receive functions can operate with the
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* GPDMA controller.
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*
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****************************************************************************/
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void lpc17_40_lowsetup(void)
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{
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#ifdef HAVE_UART
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uint32_t regval;
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/* Step 1: Enable power for all console UART and disable power for
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* other UARTs
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*/
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regval = getreg32(LPC17_40_SYSCON_PCONP);
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regval &= ~(SYSCON_PCONP_PCUART0 | SYSCON_PCONP_PCUART1 |
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SYSCON_PCONP_PCUART2 | SYSCON_PCONP_PCUART3);
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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regval |= SYSCON_PCONP_PCUART0;
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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regval |= SYSCON_PCONP_PCUART1;
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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regval |= SYSCON_PCONP_PCUART2;
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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regval |= SYSCON_PCONP_PCUART3;
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#endif
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putreg32(regval, LPC17_40_SYSCON_PCONP);
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/* Step 2: Enable peripheral clocking for the console UART and disable
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* clocking for all other UARTs
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*/
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#ifdef LPC176x
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regval = getreg32(LPC17_40_SYSCON_PCLKSEL0);
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regval &= ~(SYSCON_PCLKSEL0_UART0_MASK | SYSCON_PCLKSEL0_UART1_MASK);
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL0_UART0_SHIFT);
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL0_UART1_SHIFT);
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#endif
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putreg32(regval, LPC17_40_SYSCON_PCLKSEL0);
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regval = getreg32(LPC17_40_SYSCON_PCLKSEL1);
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regval &= ~(SYSCON_PCLKSEL1_UART2_MASK | SYSCON_PCLKSEL1_UART3_MASK);
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#if defined(CONFIG_UART2_SERIAL_CONSOLE)
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regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL1_UART2_SHIFT);
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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regval |= (CONSOLE_CCLKDIV << SYSCON_PCLKSEL1_UART3_SHIFT);
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#endif
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putreg32(regval, LPC17_40_SYSCON_PCLKSEL1);
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#endif
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/* Configure UART pins for the selected CONSOLE */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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lpc17_40_configgpio(GPIO_UART0_TXD);
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lpc17_40_configgpio(GPIO_UART0_RXD);
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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lpc17_40_configgpio(GPIO_UART1_TXD);
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lpc17_40_configgpio(GPIO_UART1_RXD);
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#if defined(CONFIG_UART1_IFLOWCONTROL) || defined(CONFIG_UART1_OFLOWCONTROL)
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lpc17_40_configgpio(GPIO_UART1_CTS);
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lpc17_40_configgpio(GPIO_UART1_DCD);
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lpc17_40_configgpio(GPIO_UART1_DSR);
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lpc17_40_configgpio(GPIO_UART1_DTR);
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lpc17_40_configgpio(GPIO_UART1_RI);
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lpc17_40_configgpio(GPIO_UART1_RTS);
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#endif
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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lpc17_40_configgpio(GPIO_UART2_TXD);
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lpc17_40_configgpio(GPIO_UART2_RXD);
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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lpc17_40_configgpio(GPIO_UART3_TXD);
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lpc17_40_configgpio(GPIO_UART3_RXD);
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#endif
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/* Configure the console (only) */
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#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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/* Clear fifos */
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putreg32(UART_FCR_RXRST | UART_FCR_TXRST,
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CONSOLE_BASE + LPC17_40_UART_FCR_OFFSET);
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/* Set trigger */
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putreg32(UART_FCR_FIFOEN | UART_FCR_RXTRIGGER_8,
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CONSOLE_BASE + LPC17_40_UART_FCR_OFFSET);
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#ifndef CONFIG_LPC17_40_UART_USE_FRACTIONAL_DIVIDER
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/* Disable FDR (fractional divider),
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* ignored by baudrate calculation => has to be disabled
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*/
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putreg32((1 << UART_FDR_MULVAL_SHIFT) + (0 << UART_FDR_DIVADDVAL_SHIFT),
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CONSOLE_BASE + LPC17_40_UART_FDR_OFFSET);
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#endif
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/* Set up the LCR and set DLAB=1 */
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putreg32(CONSOLE_LCR_VALUE | UART_LCR_DLAB,
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CONSOLE_BASE + LPC17_40_UART_LCR_OFFSET);
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#ifdef CONFIG_LPC17_40_UART_USE_FRACTIONAL_DIVIDER
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up_setbaud(CONSOLE_BASE, CONSOLE_NUMERATOR, CONSOLE_BAUD);
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#else
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/* Set the BAUD divisor */
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putreg32(CONSOLE_DL >> 8, CONSOLE_BASE + LPC17_40_UART_DLM_OFFSET);
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putreg32(CONSOLE_DL & 0xff, CONSOLE_BASE + LPC17_40_UART_DLL_OFFSET);
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#endif
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/* Clear DLAB */
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putreg32(CONSOLE_LCR_VALUE, CONSOLE_BASE + LPC17_40_UART_LCR_OFFSET);
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/* Configure the FIFOs */
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putreg32(UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST | UART_FCR_RXRST |
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UART_FCR_FIFOEN,
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CONSOLE_BASE + LPC17_40_UART_FCR_OFFSET);
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#endif
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#endif /* HAVE_UART */
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}
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