nuttx/arch/xtensa/include
Almir Okato d098c1dc87 esp32s3: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s3 targets and removes the need
for running 'make bootloader' command for it.

Other related fix, but not directly to Simple Boot:
- Instrumentation is required to run from IRAM to support it during
initialization. `is_eco0` function also needs to run from IRAM.
- `rtc.data` section placement was fixed.
- Provide arch-defined interfaces for efuses, in order to decouple
board config level from arch-defined values.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-04-17 19:43:05 +08:00
..
esp32 esp32/irq: Allow IRAM ISRs to run during SPI flash operation 2023-11-10 09:11:35 +08:00
esp32s2 xtensa/esp32s2: Add support to TWAI/CANBus controller 2023-09-28 09:35:08 +08:00
esp32s3 esp32s3: add simple boot support 2024-04-17 19:43:05 +08:00
lx6
lx7 xtensa: Add initial support for ESP32-S3 2022-01-27 13:46:50 -03:00
xtensa Indent the define statement by two spaces 2023-05-21 09:52:08 -03:00
.gitignore
arch.h xtensa/esp32s3: Disable psram as task stack 2023-11-08 16:25:57 -03:00
elf.h
inttypes.h
irq.h comments/docs: fix typos in comments 2024-03-06 13:31:50 +08:00
limits.h arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h 2022-06-03 22:25:49 +03:00
loadstore.h
setjmp.h xtensa: add setjmp.h include file 2021-11-17 02:23:45 -06:00
simcall.h
spinlock.h
stdarg.h
syscall.h xtensa: Add missing input operand on sys_call6 inline ASM 2022-05-18 15:46:57 +02:00
types.h arch: Add _wchar_t typedef like other basic types 2021-12-09 16:57:23 +09:00