936df1bcb5
Squashed commit of the following:
Change all calls to usleep() in the OS proper to calls to nxsig_usleep()
sched/signal: Add a new OS internal function nxsig_usleep() that is functionally equivalent to usleep() but does not cause a cancellaption point and does not modify the errno variable.
sched/signal: Add a new OS internal function nxsig_sleep() that is functionally equivalent to sleep() but does not cause a cancellaption point.
858 lines
26 KiB
C
858 lines
26 KiB
C
/****************************************************************************
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* drivers/mtd/sst39vf.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <string.h>
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#include <errno.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/clock.h>
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#include <nuttx/arch.h>
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#include <nuttx/signal.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/mtd/mtd.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration */
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#ifndef CONFIG_SST39VF_BASE_ADDRESS
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# error "The FLASH base address was not provided (CONFIG_SST39VF_BASE_ADDRESS)"
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#endif
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/* MAP SST39VF address to a 16-bit bus address */
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#define SST39VF_ADDR(addr) \
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(volatile FAR uint16_t *)(CONFIG_SST39VF_BASE_ADDRESS | (addr << 1))
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/* Timing */
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#define SST39VF_TBP_USEC 10 /* Word-Program Time (max); 7uS typical */
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#define SST39VF_TIDA_NSEC 150 /* Software ID Access and Exit Time (max) */
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#define SST39VF_TSE_MSEC 25 /* Sector-Erase 25 ms (max); 18 ms typical */
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#define SST39VF_TBE_MSEC 25 /* Block-Erase 25 ms (max); 18 ms typical */
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#define SST39VF_TSCE_MSEC 50 /* Chip-Erase 50 ms (max); */
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#define WORDWRITE_TIMEOUT 0x080000000
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/* IDs */
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#define SST_MANUFACTURER_ID 0xbf
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This describes one chip in the SST39VF family */
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struct sst39vf_chip_s
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{
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#if 0 /* Not used */
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bool top; /* Top protect SST39VF1602/3202 */
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#endif
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uint16_t chipid; /* ID of the chip */
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#if 0 /* Not used */
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uint16_t nblocks; /* Number of erase blocks */
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#endif
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uint16_t nsectors; /* Number of erase-ablesectors */
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#if 0 /* Not used */
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uint32_t blocksize; /* Size of one erase block */
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#endif
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uint32_t sectorsize; /* Size of one sector */
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};
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/* This type holds one FLASH address and one 16-bit FLASH data value */
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struct sst39vf_wrinfo_s
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{
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uintptr_t address;
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uint16_t data;
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};
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/* This type represents the state of the MTD device. The struct mtd_dev_s
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* must appear at the beginning of the definition so that you can freely
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* cast between pointers to struct mtd_dev_s and struct sst39vf_dev_s.
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*/
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struct sst39vf_dev_s
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{
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struct mtd_dev_s mtd;
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FAR const struct sst39vf_chip_s *chip;
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Low Level Helpers */
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static inline void sst39vf_flashwrite(FAR const struct sst39vf_wrinfo_s *wrinfo);
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static inline uint16_t sst39vf_flashread(uintptr_t address);
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static void sst39vf_writeseq(FAR const struct sst39vf_wrinfo_s *wrinfo, int nseq);
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static int sst39vf_chiperase(FAR struct sst39vf_dev_s *priv);
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static int sst39vf_sectorerase(FAR struct sst39vf_dev_s *priv,
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uintptr_t sectaddr);
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static int sst39vf_writeword(FAR const struct sst39vf_wrinfo_s *wrinfo);
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/* MTD driver methods */
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static int sst39vf_erase(FAR struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks);
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static ssize_t sst39vf_bread(FAR struct mtd_dev_s *dev,
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off_t startblock, size_t nblocks,
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FAR uint8_t *buf);
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static ssize_t sst39vf_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, FAR const uint8_t *buf);
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static ssize_t sst39vf_read(FAR struct mtd_dev_s *dev, off_t offset,
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size_t nbytes, FAR uint8_t *buffer);
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static int sst39vf_ioctl(FAR struct mtd_dev_s *dev, int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct sst39vf_chip_s g_sst39vf1601 =
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{
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/* false, top - Bottom hardware block protection */
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0x234b, /* chipid */
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/* 32, nblocks */
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512, /* nsectors */
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/* 64*1024, blocksize */
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4*1024, /* sectorsize */
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};
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static const struct sst39vf_chip_s g_sst39vf1602 =
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{
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/* true, top - Top hardware block protection */
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0x234a, /* chipid */
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/* 32, nblocks */
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512, /* nsectors */
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/* 64*1024, blocksize */
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4*1024, /* sectorsize */
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};
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static const struct sst39vf_chip_s g_sst39vf3201 =
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{
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/* false, top - Bottom hardware block protection */
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0x235b, /* chipid */
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/* 64, nblocks */
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1024, /* nsectors */
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/* 64*1024, blocksize */
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4*1024, /* sectorsize */
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};
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static const struct sst39vf_chip_s g_sst39vf3202 =
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{
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/* true, top - Top hardware block protection */
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0x235a, /* chipid */
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/* 64, nblocks */
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1024, /* nsectors */
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/* 64*1024, blocksize */
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4*1024, /* sectorsize */
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};
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/* This structure holds the state of the MTD driver */
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static struct sst39vf_dev_s g_sst39vf =
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{
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{
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sst39vf_erase, /* erase method */
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sst39vf_bread, /* bread method */
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sst39vf_bwrite, /* bwrte method */
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sst39vf_read, /* read method */
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#ifdef CONFIG_MTD_BYTE_WRITE
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NULL, /* write method */
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#endif
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sst39vf_ioctl /* ioctl method */
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},
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NULL /* Chip */
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};
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/* Command sequences */
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static const struct sst39vf_wrinfo_s g_wordprogram[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x00a0} /* , {address, data} */
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};
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static const struct sst39vf_wrinfo_s g_sectorerase[5] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0080},
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{0x5555, 0x00aa}, {0x2aaa, 0x0055} /* , {sector, 0x0030} */
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};
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#if 0 /* Not used */
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static const struct sst39vf_wrinfo_s g_blockerase[5] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x80},
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{0x5555, 0x00aa}, {0x2aaa, 0x0055} /* , {block, 0x0050} */
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};
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#endif
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static const struct sst39vf_wrinfo_s g_chiperase[6] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0080},
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0010}
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};
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#if 0 /* Not used */
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static const struct sst39vf_wrinfo_s g_erasesuspend[1] =
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{
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{0x5555, 0x00aa}
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};
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static const struct sst39vf_wrinfo_s g_eraseresume[1] =
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{
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{0x5555, 0x00aa}
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};
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static const struct sst39vf_wrinfo_s g_querysecid[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0088}
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};
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static const struct sst39vf_wrinfo_s g_securityid_wordprogram[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x00a5}, /* {address, data} */
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};
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static const struct sst39vf_wrinfo_s g_securityid_lockout[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0085} /* {0xXX, 0x0000} */
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};
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#endif
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static const struct sst39vf_wrinfo_s g_swid_entry[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0090}
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};
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#if 0 /* Not used */
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static const struct sst39vf_wrinfo_s g_cfiquery[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x0080},
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};
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#endif
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static const struct sst39vf_wrinfo_s g_swid_exit[3] =
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{
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{0x5555, 0x00aa}, {0x2aaa, 0x0055}, {0x5555, 0x00f0}
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};
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#if 0 /* Not used */
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static const struct sst39vf_wrinfo_s g_swid_exit2[1] =
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{
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{0x0000, 0x00f0},
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sst39vf_flashwrite
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*
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* Description:
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* Write one value to FLASH
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*
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****************************************************************************/
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static inline void sst39vf_flashwrite(FAR const struct sst39vf_wrinfo_s *wrinfo)
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{
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volatile uint16_t *addr = SST39VF_ADDR(wrinfo->address);
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*addr = wrinfo->data;
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}
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/****************************************************************************
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* Name: sst39vf_flashread
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*
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* Description:
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* Read one value from FLASH
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*
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****************************************************************************/
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static inline uint16_t sst39vf_flashread(uintptr_t address)
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{
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return *SST39VF_ADDR(address);
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}
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/****************************************************************************
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* Name: sst39vf_writeseq
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*
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* Description:
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* Write a sequence of values to FLASH
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*
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****************************************************************************/
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static void sst39vf_writeseq(FAR const struct sst39vf_wrinfo_s *wrinfo, int nseq)
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{
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while (nseq--)
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{
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sst39vf_flashwrite(wrinfo);
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wrinfo++;
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}
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}
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/****************************************************************************
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* Name: sst39vf_checktoggle
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*
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* Description:
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* Check for bit toggle
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*
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* "Toggle Bits (DQ6 and DQ2). During the internal Program or Erase
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* operation, any consecutive attempts to read DQ6 will produce
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* alternating <20>1<EFBFBD>s and <20>0<EFBFBD>s, i.e., toggling between 1 and 0. When
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* the internal Program or Erase operation is completed, the DQ6 bit
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* will stop toggling. The device is then ready for the next operation.
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* For Sector-, Block-, or Chip-Erase, the toggle bit (DQ6) is valid
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* after the rising edge of sixth WE# (or CE#) pulse. DQ6 will be set to
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* <20>1<EFBFBD> if a Read operation is attempted on an Erase-Suspended
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* Sector/Block. If Program operation is initiated in a sector/block not
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* selected in Erase-Suspend mode, DQ6 will toggle.
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*
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* "An additional Toggle Bit is available on DQ2, which can be used in
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* conjunction with DQ6 to check whether a particular sector is being
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* actively erased or erase-suspended. ... The Toggle Bit (DQ2) is valid
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* after the rising edge of the last WE# (or CE#) pulse of Write operation.
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* ..."
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*
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****************************************************************************/
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static bool sst39vf_checktoggle(FAR const struct sst39vf_wrinfo_s *wrinfo)
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{
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uint16_t value1;
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uint16_t value2;
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value1 = sst39vf_flashread(wrinfo->address);
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value2 = sst39vf_flashread(wrinfo->address);
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return (value1 == value2);
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}
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/****************************************************************************
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* Name: sst39vf_waittoggle
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*
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* Description:
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* Wait until the data is no longer toggling.
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*
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****************************************************************************/
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static int sst39vf_waittoggle(FAR const struct sst39vf_wrinfo_s *wrinfo,
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uint32_t retries)
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{
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while (retries-- > 0)
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{
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if (sst39vf_checktoggle(wrinfo))
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{
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return OK;
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}
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}
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return -ETIMEDOUT;
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}
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/****************************************************************************
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* Name: sst39vf_chiperase
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*
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* Description:
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* Erase the entire chip
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*
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* "The SST39VF160x/320x provide a Chip-Erase operation, which allows the
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* user to erase the entire memory array to the <20>1<EFBFBD> state. This is useful
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* when the entire device must be quickly erased. The Chip-Erase operation
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* is initiated by executing a six-byte command sequence with Chip-Erase
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* command (10H) at address 5555H in the last byte sequence. The Erase
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* operation begins with the rising edge of the sixth WE# or CE#,
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* whichever occurs first. During the Erase operation, the only valid
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* read is Toggle Bit or Data# Polling... Any commands issued during the
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* Chip-Erase operation are ignored. When WP# is low, any attempt to
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* Chip-Erase will be ignored. During the command sequence, WP# should
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* be statically held high or low."
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*
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****************************************************************************/
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static int sst39vf_chiperase(FAR struct sst39vf_dev_s *priv)
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{
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#if 0
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struct sst39vf_wrinfo_s wrinfo;
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systime_t start;
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systime_t elapsed;
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#endif
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/* Send the sequence to erase the chip */
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sst39vf_writeseq(g_chiperase, 6);
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/* Use the data toggle delay method. The typical delay is 40 MSec. The
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* maximum is 50 MSec. So using the data toggle delay method should give
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* better chip erase performance by about 10MS.
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*/
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#if 0
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wrinfo.address = CONFIG_SST39VF_BASE_ADDRESS;
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wrinfo.data = 0xffff;
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start = clock_systimer();
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while (delay < MSEC2TICK(SST39VF_TSCE_MSEC))
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{
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/* Check if the erase is complete */
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if (sst39vf_checktoggle(&wrinfo))
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{
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return OK;
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}
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/* No, check if the timeout has elapsed */
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elapsed = clock_systimer() - start;
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if (elapsed > MSEC2TICK(SST39VF_TSCE_MSEC))
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{
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return -ETIMEDOUT;
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}
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/* No, wait one system clock tick */
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nxsig_usleep(USEC_PER_TICK);
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}
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#else
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/* Delay the maximum amount of time for the chip erase to complete. */
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nxsig_usleep(SST39VF_TSCE_MSEC * USEC_PER_MSEC);
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#endif
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return OK;
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}
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/****************************************************************************
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* Name: sst39vf_sectorerase
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*
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* Description:
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* Erase the entire chip
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*
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* "... The Sector-Erase operation is initiated by executing a six-byte
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* command sequence with Sector-Erase command (30H) and sector address
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* (SA) in the last bus cycle.
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*
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* The sector ... address is latched on the falling edge of the sixth
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* WE# pulse, while the command (30H or 50H) is latched on the rising edge
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* of the sixth WE# pulse. The internal Erase operation begins after the
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* sixth WE# pulse. The End-of-Erase operation can be determined using
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* either Data# Polling or Toggle Bit methods."
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*
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****************************************************************************/
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static int sst39vf_sectorerase(FAR struct sst39vf_dev_s *priv,
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uintptr_t sectaddr)
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{
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struct sst39vf_wrinfo_s wrinfo;
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#if 0
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systime_t start;
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systime_t elapsed;
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#endif
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/* Set up the sector address */
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wrinfo.address = sectaddr;
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wrinfo.data = 0x0030;
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/* Send the sequence to erase the chip */
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sst39vf_writeseq(g_sectorerase, 5);
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sst39vf_flashwrite(&wrinfo);
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|
||
/* Use the data toggle delay method. The typical delay is 18 MSec. The
|
||
* maximum is 25 MSec. With a 10 MS system timer resolution, this is
|
||
* the difference of of waiting 20MS vs. 20MS. So using the data toggle
|
||
* delay method should give better write performance by about 10MS per
|
||
* block.
|
||
*/
|
||
|
||
#if 0
|
||
start = clock_systimer();
|
||
while (delay < MSEC2TICK(SST39VF_TSE_MSEC))
|
||
{
|
||
/* Check if the erase is complete */
|
||
|
||
if (sst39vf_checktoggle(&wrinfo))
|
||
{
|
||
return OK;
|
||
}
|
||
|
||
/* No, check if the timeout has elapsed */
|
||
|
||
elapsed = clock_systimer() - start;
|
||
if (elapsed > MSEC2TICK(SST39VF_TSE_MSEC))
|
||
{
|
||
return -ETIMEDOUT;
|
||
}
|
||
|
||
/* No, wait one system clock tick */
|
||
|
||
nxsig_usleep(USEC_PER_TICK);
|
||
}
|
||
#else
|
||
/* Delay the maximum amount of time for the sector erase to complete. */
|
||
|
||
nxsig_usleep(SST39VF_TSE_MSEC * USEC_PER_MSEC);
|
||
#endif
|
||
|
||
return OK;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_writeword
|
||
*
|
||
* Description:
|
||
* Write one 16-bit word to FLASH
|
||
*
|
||
* "The SST39VF160x/320x are programmed on a word-by-word basis. Before
|
||
* programming, the sector where the word exists must be fully erased. The
|
||
* rogram operation is accomplished in three steps. The first step is the
|
||
* three-byte load sequence for Software Data Protection. The second step
|
||
* is to load word address and word data. During the Word-Program operation,
|
||
* the addresses are latched on the falling edge of either CE# or WE#,
|
||
* whichever occurs last. The data is latched on the rising edge of either
|
||
* CE# or WE#, whichever occurs first. The third step is the internal
|
||
* Program operation which is initiated after the rising edge of the
|
||
* fourth WE# or CE#, whichever occurs first. The Program operation, once
|
||
* initiated, will be completed within 10 <20>s. .... During the Program
|
||
* operation, the only valid reads are Data# Polling and Toggle Bit.
|
||
* During the internal Program operation, the host is free to perform
|
||
* additional tasks. Any commands issued during the internal Program
|
||
* operation are ignored. During the command sequence, WP# should be
|
||
* statically held high or low."
|
||
*
|
||
****************************************************************************/
|
||
|
||
static int sst39vf_writeword(FAR const struct sst39vf_wrinfo_s *wrinfo)
|
||
{
|
||
/* Send the sequence to write the word to the chip */
|
||
|
||
sst39vf_writeseq(g_wordprogram, 3);
|
||
sst39vf_flashwrite(wrinfo);
|
||
|
||
/* Use the data toggle delay method. The typical delay is 7 usec; the
|
||
* maximum is 10 usec.
|
||
*/
|
||
|
||
return sst39vf_waittoggle(wrinfo, WORDWRITE_TIMEOUT);
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_erase
|
||
*
|
||
* Description:
|
||
* Erase several blocks, each of the size previously reported (i.e., one
|
||
* SST39VF sector).
|
||
*
|
||
****************************************************************************/
|
||
|
||
static int sst39vf_erase(FAR struct mtd_dev_s *dev, off_t startblock,
|
||
size_t nblocks)
|
||
{
|
||
FAR struct sst39vf_dev_s *priv = (FAR struct sst39vf_dev_s *)dev;
|
||
uintptr_t address;
|
||
int ret;
|
||
|
||
DEBUGASSERT(priv && priv->chip && startblock < priv->chip->nsectors);
|
||
|
||
for (address = startblock * priv->chip->sectorsize;
|
||
nblocks > 0;
|
||
nblocks--, address += priv->chip->sectorsize)
|
||
{
|
||
/* Clear the sector */
|
||
|
||
ret = sst39vf_sectorerase(priv, address);
|
||
if (ret < 0)
|
||
{
|
||
return ret;
|
||
}
|
||
}
|
||
|
||
return OK;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_bread
|
||
*
|
||
* Description:
|
||
* Read the specified number of blocks into the user provided buffer.
|
||
*
|
||
****************************************************************************/
|
||
|
||
static ssize_t sst39vf_bread(FAR struct mtd_dev_s *dev, off_t startblock,
|
||
size_t nblocks, FAR uint8_t *buf)
|
||
{
|
||
FAR struct sst39vf_dev_s *priv = (FAR struct sst39vf_dev_s *)dev;
|
||
FAR const uint8_t *source;
|
||
size_t nbytes;
|
||
|
||
DEBUGASSERT(priv && priv->chip && startblock < priv->chip->nsectors);
|
||
|
||
/* Get the source address and the size of the transfer */
|
||
|
||
source = (FAR const uint8_t *)
|
||
SST39VF_ADDR(startblock * priv->chip->sectorsize);
|
||
nbytes = nblocks * priv->chip->sectorsize;
|
||
|
||
/* Copy the data to the user buffer */
|
||
|
||
memcpy(buf, source, nbytes);
|
||
return nblocks;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_bwrite
|
||
*
|
||
* Description:
|
||
* Write the specified number of blocks from the user provided buffer.
|
||
*
|
||
****************************************************************************/
|
||
|
||
static ssize_t sst39vf_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
|
||
size_t nblocks, FAR const uint8_t *buf)
|
||
{
|
||
FAR struct sst39vf_dev_s *priv = (FAR struct sst39vf_dev_s *)dev;
|
||
struct sst39vf_wrinfo_s wrinfo;
|
||
FAR const uint16_t *source = (FAR const uint16_t *)buf;
|
||
size_t nwords;
|
||
int ret;
|
||
|
||
DEBUGASSERT(priv && priv->chip && ((uintptr_t)buf & 1) == 0 &&
|
||
startblock < priv->chip->nsectors);
|
||
|
||
/* Get the destination address and the size of the transfer */
|
||
|
||
wrinfo.address =
|
||
(uintptr_t)SST39VF_ADDR((startblock * priv->chip->sectorsize));
|
||
nwords = nblocks * (priv->chip->sectorsize >> 1);
|
||
|
||
/* Copy the data to the user buffer */
|
||
|
||
while (nwords-- > 0)
|
||
{
|
||
wrinfo.data = *source++;
|
||
ret = sst39vf_writeword(&wrinfo);
|
||
if (ret < 0)
|
||
{
|
||
return ret;
|
||
}
|
||
|
||
wrinfo.address += sizeof(uint16_t);
|
||
}
|
||
|
||
return nblocks;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_read
|
||
*
|
||
* Description:
|
||
* Read the specified number of bytes to the user provided buffer.
|
||
*
|
||
****************************************************************************/
|
||
|
||
static ssize_t sst39vf_read(FAR struct mtd_dev_s *dev, off_t offset,
|
||
size_t nbytes, FAR uint8_t *buffer)
|
||
{
|
||
#ifdef CONFIG_DEBUG_FEATURES
|
||
FAR struct sst39vf_dev_s *priv = (FAR struct sst39vf_dev_s *)dev;
|
||
#endif
|
||
FAR const uint8_t *source;
|
||
|
||
DEBUGASSERT(priv && priv->chip &&
|
||
offset < priv->chip->nsectors * priv->chip->sectorssize);
|
||
|
||
/* Get the source address and the size of the transfer */
|
||
|
||
source = (FAR const uint8_t *)SST39VF_ADDR(offset);
|
||
|
||
/* Copy the data to the user buffer */
|
||
|
||
memcpy(buffer, source, nbytes);
|
||
return nbytes;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_ioctl
|
||
****************************************************************************/
|
||
|
||
static int sst39vf_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
|
||
{
|
||
FAR struct sst39vf_dev_s *priv = (FAR struct sst39vf_dev_s *)dev;
|
||
int ret = -ENOTTY;
|
||
|
||
DEBUGASSERT(priv && priv->chip);
|
||
|
||
switch (cmd)
|
||
{
|
||
case MTDIOC_GEOMETRY:
|
||
{
|
||
FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)arg;
|
||
if (geo)
|
||
{
|
||
/* Populate the geometry structure with information need to know
|
||
* the capacity and how to access the device.
|
||
*/
|
||
|
||
geo->blocksize = priv->chip->sectorsize;
|
||
geo->erasesize = priv->chip->sectorsize;
|
||
geo->neraseblocks = priv->chip->nsectors;
|
||
ret = OK;
|
||
}
|
||
}
|
||
break;
|
||
|
||
case MTDIOC_XIPBASE:
|
||
{
|
||
FAR void **ppv = (FAR void **)arg;
|
||
if (ppv)
|
||
{
|
||
/* Return the base address of FLASH memory */
|
||
|
||
*ppv = (FAR void *)CONFIG_SST39VF_BASE_ADDRESS;
|
||
ret = OK;
|
||
}
|
||
}
|
||
break;
|
||
|
||
case MTDIOC_BULKERASE:
|
||
{
|
||
/* Erase the entire chip */
|
||
|
||
return sst39vf_chiperase(priv);
|
||
}
|
||
break;
|
||
|
||
default:
|
||
ret = -ENOTTY; /* Bad command */
|
||
break;
|
||
}
|
||
|
||
return ret;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Public Functions
|
||
****************************************************************************/
|
||
|
||
/****************************************************************************
|
||
* Name: sst39vf_initialize
|
||
*
|
||
* Description:
|
||
* Create and initialize an MTD device instance assuming an SST39VF NOR
|
||
* FLASH device at the configured address in memory. MTD devices are not
|
||
* registered in the file system, but are created as instances that can
|
||
* be bound to other functions (such as a block or character driver front
|
||
* end).
|
||
*
|
||
****************************************************************************/
|
||
|
||
FAR struct mtd_dev_s *sst39vf_initialize(void)
|
||
{
|
||
uint16_t manufacturer;
|
||
uint16_t chipid;
|
||
|
||
DEBUGASSERT(g_sst39vf.chip == NULL);
|
||
|
||
/* Issue the software entry command sequence */
|
||
|
||
sst39vf_writeseq(g_swid_entry, 3);
|
||
up_udelay(10);
|
||
|
||
/* Read the manufacturer and chip ID */
|
||
|
||
manufacturer = sst39vf_flashread(0x0000);
|
||
chipid = sst39vf_flashread(0x0001);
|
||
|
||
/* Issue the software exit sequence */
|
||
|
||
sst39vf_writeseq(g_swid_exit, 3);
|
||
up_udelay(10);
|
||
|
||
/* Now see if we can suport the part */
|
||
|
||
finfo("Manufacturer: %02x\n", manufacturer);
|
||
finfo("Chip ID: %04x\n", chipid);
|
||
|
||
if (manufacturer != SST_MANUFACTURER_ID)
|
||
{
|
||
ferr("ERROR: Unrecognized manufacturer: %02x\n", manufacturer);
|
||
return NULL;
|
||
}
|
||
else if (chipid == g_sst39vf1601.chipid)
|
||
{
|
||
g_sst39vf.chip = &g_sst39vf1601;
|
||
}
|
||
else if (chipid == g_sst39vf1602.chipid)
|
||
{
|
||
g_sst39vf.chip = &g_sst39vf1602;
|
||
}
|
||
else if (chipid == g_sst39vf3201.chipid)
|
||
{
|
||
g_sst39vf.chip = &g_sst39vf3201;
|
||
}
|
||
else if (chipid == g_sst39vf3202.chipid)
|
||
{
|
||
g_sst39vf.chip = &g_sst39vf3202;
|
||
}
|
||
else
|
||
{
|
||
ferr("ERROR: Unrecognized chip ID: %04x\n", chipid);
|
||
return NULL;
|
||
}
|
||
|
||
/* Register the MTD with the procfs system if enabled */
|
||
|
||
#ifdef CONFIG_MTD_REGISTRATION
|
||
mtd_register(&priv->mtd, "sst39vf");
|
||
#endif
|
||
|
||
/* Return the state structure as the MTD device */
|
||
|
||
return (FAR struct mtd_dev_s *)&g_sst39vf;
|
||
}
|