e7ed720699
The ARMv7 specifies minimal alignment to be 8 for EABI. Ensure that sections are placed with even greater minimal alignment. Sections final alignment should be adjusted according to alignment of their inputs, but for some reasons some combinations lead to .ARM.exidx overlap with .data. When alignment is increased then the direct fetch of the fill location _eronly = ABSOLUTE(.); does not match with final LMA placement of the .data section. Use constructs which should result in matching .data LMA address for all cases _eronly = ABSOLUTE(.); Signed-off-by: Pavel Pisa <ppisa@pikron.com>
130 lines
4.2 KiB
Plaintext
130 lines
4.2 KiB
Plaintext
/****************************************************************************
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* boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Rommel Marcelo
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* Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* The LPC1788 has 512Kb of FLASH beginning at address 0x0000:0000 and
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* 96Kb of total SRAM: 64Kb of SRAM in the CPU block beginning at address
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* 0x10000000 and 32Kb of Peripheral SRAM in two banks, 8Kb at addresses
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* 0x20000000 bank0 first and 8kb at 0x20002000 at bank0 second. And 16Kb
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* at 0x20004000 on bank1.
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*
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* Here we assume that .data and .bss will all fit into the 64Kb CPU SRAM
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* address range.
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*/
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
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SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
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AHBRAM8_B0A(rwx): ORIGIN = 0x20000000, LENGTH = 8K
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AHBRAM8_B0B(rwx): ORIGIN = 0x20002000, LENGTH = 8K
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AHBRAM16(rwx): ORIGIN = 0x20004000, LENGTH = 16K
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/* External SDRAM - 32MB for LX_CPU */
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SDRAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 32M
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}
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OUTPUT_ARCH(arm)
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EXTERN(_vectors)
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ENTRY(_stext)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > FLASH
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.init_section : ALIGN(16) {
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > FLASH
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.ARM.extab : ALIGN(16) {
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*(.ARM.extab*)
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} > FLASH
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.ARM.exidx : ALIGN(16) {
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} > FLASH
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.data : ALIGN(16) {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > SRAM AT > FLASH
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_eronly = LOADADDR(.data);
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.bss : ALIGN(16) {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > SRAM
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/* Stabs debugging sections */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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