| .. |
|
a1x
|
Eliminate a warning detected by nuttx/tools/testbuild.sh
|
2015-07-22 14:11:10 -06:00 |
|
arm
|
Fixes that call sched_resume_scheduler and sched_suspend_scheduler must include nuttx/sched.h
|
2015-07-29 16:51:26 -06:00 |
|
armv6-m
|
Newer 4.9 GCC does not permit both -mcpu= and -march= on the command line; either -mcpu= or -march= with -mtune. The latter gives me linking errors so all of the arguments committed to the former. Untested on more tools
|
2015-07-31 08:39:26 -06:00 |
|
armv7-a
|
Fixes that call sched_resume_scheduler and sched_suspend_scheduler must include nuttx/sched.h
|
2015-07-29 16:51:26 -06:00 |
|
armv7-m
|
Newer 4.9 GCC does not permit both -mcpu= and -march= on the command line; either -mcpu= or -march= with -mtune. The latter gives me linking errors so all of the arguments committed to the former. Untested on more tools
|
2015-07-31 08:39:26 -06:00 |
|
c5471
|
Fix misc. compilation error/warning detected by tools/testbuild.sh
|
2015-07-01 14:33:37 -06:00 |
|
calypso
|
Correct some issues introduced in the last commit
|
2015-07-02 17:54:05 -06:00 |
|
common
|
Add CONFIG_NETDEV_LATEINIT that can be used to suppress calls to up_netinitialize() from early initialization
|
2015-07-17 07:20:16 -06:00 |
|
dm320
|
DM320: GIO header uses get/putreg functions and so should include up_arch.h
|
2015-07-01 08:01:49 -06:00 |
|
efm32
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
imx
|
Fix references to the no-longer-existent misc/ directory in comments, README files, and documentation
|
2015-06-28 08:08:57 -06:00 |
|
kinetis
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
kl
|
Fix references to the no-longer-existent misc/ directory in comments, README files, and documentation
|
2015-06-28 08:08:57 -06:00 |
|
lpc11xx
|
Fix some warnings/errors detected by nuttx/tools/testbuilds.sh
|
2015-07-10 18:41:26 -06:00 |
|
lpc17xx
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
lpc31xx
|
Fix some warnings/errors detected by nuttx/tools/testbuilds.sh
|
2015-07-10 18:41:26 -06:00 |
|
lpc43xx
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
lpc214x
|
Fix more common typos
|
2015-08-16 11:06:29 -06:00 |
|
lpc2378
|
Fix references to the no-longer-existent misc/ directory in comments, README files, and documentation
|
2015-06-28 08:08:57 -06:00 |
|
moxart
|
Trivial spacing change
|
2015-08-11 07:51:31 -06:00 |
|
nuc1xx
|
Fix some common typos
|
2015-08-16 10:59:10 -06:00 |
|
sam34
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
sama5
|
All CAN drivers: Set the new error indication to zero in the CAN message report
|
2015-08-18 07:24:12 -06:00 |
|
samdl
|
Fix some common typos
|
2015-08-16 10:59:10 -06:00 |
|
samv7
|
SAMV7 QSPI: Add framework for a QSPI driver. Initial commit is just the SPI driver with some name changes
|
2015-08-21 14:22:47 -06:00 |
|
stm32
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
stm32f7
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
str71x
|
Fix references to the no-longer-existent misc/ directory in comments, README files, and documentation
|
2015-06-28 08:08:57 -06:00 |
|
tiva
|
All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa
|
2015-08-21 08:42:24 -06:00 |
|
.gitignore
|
.dSYM only needs to be in the same .gitignore files as .exe
|
2013-05-30 15:02:04 -06:00 |
|
Makefile
|
Cortex-M7/SAMV71-XULT: Various fixes for building Cortex-M7 with SAMV71.
|
2015-03-06 10:53:57 -06:00 |
