49cbcfb5e6
According to the eMMC specification, in Backwards Compatibility with legacy MMC card mode, the frequency of the SD clock must be 0-26 MHZ; in high speed SDR mode, it must be 0-52MHZ. So we should switch to high speed SDR mode if the clock frequency is higher than 26MHZ. Signed-off-by: Yinzhe Wu <Yinzhe.Wu@sony.com> Reviewed-by: Yuezhang Mo <Yuezhang.Mo@sony.com> Reviewed-by: Jacky Cao <Jacky.Cao@sony.com> Tested-by: Yinzhe Wu <Yinzhe.Wu@sony.com>
391 lines
19 KiB
C
391 lines
19 KiB
C
/****************************************************************************
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* drivers/mmcsd/mmcsd_sdio.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __DRIVERS_MMCSD_MMCSD_SDIO_H
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#define __DRIVERS_MMCSD_MMCSD_SDIO_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* CMD6 (MMC_SWITCH) argument
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* MMC_SWITCH argument format:
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*
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* [31:26] Always 0
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* [25:24] Access Mode
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* [23:16] Location of target Byte in EXT_CSD
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* [15:08] Value Byte
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* [07:03] Always 0
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* [02:00] Command Set(Ignored if not used to change the command set)
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*/
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#define MMC_CMD6_CMDSET_SHIFT (0)
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#define MMC_CMD6_VALUE_SHIFT (8)
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#define MMC_CMD6_INDEX_SHIFT (16)
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#define MMC_CMD6_MODE_SHIFT (24)
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#define MMC_CMD6_CMDSET(cmdset) ((uint32_t)(cmdset) << MMC_CMD6_CMDSET_SHIFT)
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#define MMC_CMD6_VALUE(value) ((uint32_t)(value) << MMC_CMD6_VALUE_SHIFT)
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#define MMC_CMD6_INDEX(index) ((uint32_t)(index) << MMC_CMD6_INDEX_SHIFT)
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#define MMC_CMD6_MODE(mode) ((uint32_t)(mode) << MMC_CMD6_MODE_SHIFT)
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#define MMC_CMD6_MODE_CMD_SET (0x00) /* Change the command set */
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#define MMC_CMD6_MODE_SET_BITS (0x01) /* Set bits which are 1 in value */
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#define MMC_CMD6_MODE_CLEAR_BITS (0x02) /* Clear bits which are 1 in value */
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#define MMC_CMD6_MODE_WRITE_BYTE (0x03) /* Set target to value */
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#define EXT_CSD_BUS_WIDTH 183 /* WO */
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#define EXT_CSD_HS_TIMING 185 /* R/W */
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/* EXT_CSD_BUS_WIDTH */
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#define EXT_CSD_BUS_WIDTH_1 (0x00) /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 (0x01) /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 (0x02) /* Card is in 8 bit mode */
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#define EXT_CSD_DDR_BUS_WIDTH_4 (0x05) /* Card is in 4 bit DDR mode */
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#define EXT_CSD_DDR_BUS_WIDTH_8 (0x06) /* Card is in 8 bit DDR mode */
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#define MMC_CMD6_BUSWIDTH(width) (MMC_CMD6_VALUE(width) | \
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MMC_CMD6_INDEX(EXT_CSD_BUS_WIDTH) | \
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MMC_CMD6_MODE(MMC_CMD6_MODE_WRITE_BYTE))
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/* EXT_CSD_HS_TIMING */
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#define EXT_CSD_HS_TIMING_BC 0
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#define EXT_CSD_HS_TIMING_HS 1
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#define EXT_CSD_HS_TIMING_HS200 2
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#define EXT_CSD_HS_TIMING_HS400 3
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#define MMC_CMD6_HS_TIMING(timing) (MMC_CMD6_VALUE(timing) | \
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MMC_CMD6_INDEX(EXT_CSD_HS_TIMING) | \
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MMC_CMD6_MODE(MMC_CMD6_MODE_WRITE_BYTE))
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/* CMD8 Argument:
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* [31:12]: Reserved (shall be set to '0')
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* [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
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* [7:0]: Check Pattern (recommended 0xaa)
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* CMD8 Response: R7
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*/
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#define MMCSD_CMD8VOLTAGE_SHIFT (8) /* Bits 8-11: Supply voltage */
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#define MMCSD_CMD8VOLTAGE_MASK ((uint32_t)0x0f << MMCSD_CMD8VOLTAGE_SHIFT)
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# define MMCSD_CMD8VOLTAGE_27 ((uint32_t)0x01 << MMCSD_CMD8VOLTAGE_SHIFT) /* 2.7-3.6V */
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#define MMCSD_CMD8ECHO_SHIFT (0) /* Bits 0-7: Check pattern */
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#define MMCSD_CMD8ECHO_MASK ((uint32_t)0xff << MMCSD_CMD8ECHO_SHIFT)
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# define MMCSD_CMD8CHECKPATTERN ((uint32_t)0xaa << MMCSD_CMD8ECHO_SHIFT)
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/* ACMD6 argument */
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#define MMCSD_ACMD6_BUSWIDTH_1 ((uint32_t)0) /* Bus width = 1-bit */
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#define MMCSD_ACMD6_BUSWIDTH_4 ((uint32_t)2) /* Bus width = 4-bit */
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/* ACMD41 argument */
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#define MMCSD_ACMD41_VOLTAGEWINDOW_34_33 ((uint32_t)1 << 21)
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#define MMCSD_ACMD41_VOLTAGEWINDOW_33_32 ((uint32_t)1 << 20)
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#define MMCSD_ACMD41_VOLTAGEWINDOW_32_31 ((uint32_t)1 << 19)
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#define MMCSD_ACMD41_HIGHCAPACITY ((uint32_t)1 << 30)
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#define MMCSD_ACMD41_STDCAPACITY ((uint32_t)0 << 30)
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/* ACMD42 argument */
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#define MMCSD_ACMD42_CD_DISCONNECT ((uint32_t)0) /* Disconnect card detection logic */
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#define MMCSD_ACMD42_CD_CONNECT ((uint32_t)1) /* Connect card detection logic */
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/* R1 Card Status bit definitions */
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#define MMCSD_R1_OUTOFRANGE ((uint32_t)1 << 31) /* Bad argument */
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#define MMCSD_R1_ADDRESSERROR ((uint32_t)1 << 30) /* Bad address */
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#define MMCSD_R1_BLOCKLENERROR ((uint32_t)1 << 29) /* Bad block length */
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#define MMCSD_R1_ERASESEQERROR ((uint32_t)1 << 28) /* Erase cmd error */
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#define MMCSD_R1_ERASEPARAM ((uint32_t)1 << 27) /* Bad write blocks */
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#define MMCSD_R1_WPVIOLATION ((uint32_t)1 << 26) /* Erase access failure */
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#define MMCSD_R1_CARDISLOCKED ((uint32_t)1 << 25) /* Card is locked */
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#define MMCSD_R1_LOCKUNLOCKFAILED ((uint32_t)1 << 24) /* Password error */
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#define MMCSD_R1_COMCRCERROR ((uint32_t)1 << 23) /* CRC error */
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#define MMCSD_R1_ILLEGALCOMMAND ((uint32_t)1 << 22) /* Bad command */
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#define MMCSD_R1_CARDECCFAILED ((uint32_t)1 << 21) /* Failed to correct data */
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#define MMCSD_R1_CCERROR ((uint32_t)1 << 20) /* Card controller error */
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#define MMCSD_R1_ERROR ((uint32_t)1 << 19) /* General error */
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#define MMCSD_R1_UNDERRUN ((uint32_t)1 << 18) /* Underrun (MMC only) */
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#define MMCSD_R1_OVERRRUN ((uint32_t)1 << 17) /* Overrun (MMC only) */
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#define MMCSD_R1_CIDCSDOVERWRITE ((uint32_t)1 << 16) /* CID/CSD error */
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#define MMCSD_R1_WPERASESKIP ((uint32_t)1 << 15) /* Not all erased */
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#define MMCSD_R1_CARDECCDISABLED ((uint32_t)1 << 14) /* Internal ECC not used */
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#define MMCSD_R1_ERASERESET ((uint32_t)1 << 13) /* Reset sequence cleared */
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#define MMCSD_R1_STATE_SHIFT (9) /* Current card state */
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#define MMCSD_R1_STATE_MASK ((uint32_t)15 << MMCSD_R1_STATE_SHIFT)
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/* Card identification mode states */
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# define MMCSD_R1_STATE_IDLE ((uint32_t)0 << MMCSD_R1_STATE_SHIFT) /* 0=Idle state */
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# define MMCSD_R1_STATE_READY ((uint32_t)1 << MMCSD_R1_STATE_SHIFT) /* 1=Ready state */
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# define MMCSD_R1_STATE_IDENT ((uint32_t)2 << MMCSD_R1_STATE_SHIFT) /* 2=Identification state */
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/* Data transfer states */
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# define MMCSD_R1_STATE_STBY ((uint32_t)3 << MMCSD_R1_STATE_SHIFT) /* 3=Standby state */
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# define MMCSD_R1_STATE_TRAN ((uint32_t)4 << MMCSD_R1_STATE_SHIFT) /* 4=Transfer state */
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# define MMCSD_R1_STATE_DATA ((uint32_t)5 << MMCSD_R1_STATE_SHIFT) /* 5=Sending data state */
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# define MMCSD_R1_STATE_RCV ((uint32_t)6 << MMCSD_R1_STATE_SHIFT) /* 6=Receiving data state */
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# define MMCSD_R1_STATE_PRG ((uint32_t)7 << MMCSD_R1_STATE_SHIFT) /* 7=Programming state */
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# define MMCSD_R1_STATE_DIS ((uint32_t)8 << MMCSD_R1_STATE_SHIFT) /* 8=Disconnect state */
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#define MMCSD_R1_READYFORDATA ((uint32_t)1 << 8) /* Buffer empty */
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#define MMCSD_R1_APPCMD ((uint32_t)1 << 5) /* Next CMD is ACMD */
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#define MMCSD_R1_AKESEQERROR ((uint32_t)1 << 3) /* Authentication error */
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#define MMCSD_R1_ERRORMASK ((uint32_t)0xfdffe008) /* Error mask */
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#define IS_STATE(v,s) ((((uint32_t)v)&MMCSD_R1_STATE_MASK)==(s))
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/* R3 (OCR) */
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#define MMC_VDD_20_36 ((uint32_t)0x00ffff00) /* VDD voltage 2.0-3.6 */
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#define MMCSD_VDD_145_150 ((uint32_t)1 << 0) /* VDD voltage 1.45 - 1.50 */
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#define MMCSD_VDD_150_155 ((uint32_t)1 << 1) /* VDD voltage 1.50 - 1.55 */
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#define MMCSD_VDD_155_160 ((uint32_t)1 << 2) /* VDD voltage 1.55 - 1.60 */
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#define MMCSD_VDD_160_165 ((uint32_t)1 << 3) /* VDD voltage 1.60 - 1.65 */
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#define MMCSD_VDD_165_170 ((uint32_t)1 << 4) /* VDD voltage 1.65 - 1.70 */
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#define MMCSD_VDD_17_18 ((uint32_t)1 << 5) /* VDD voltage 1.7 - 1.8 */
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#define MMCSD_VDD_18_19 ((uint32_t)1 << 6) /* VDD voltage 1.8 - 1.9 */
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#define MMCSD_VDD_19_20 ((uint32_t)1 << 7) /* VDD voltage 1.9 - 2.0 */
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#define MMCSD_VDD_20_21 ((uint32_t)1 << 8) /* VDD voltage 2.0-2.1 */
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#define MMCSD_VDD_21_22 ((uint32_t)1 << 9) /* VDD voltage 2.1-2.2 */
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#define MMCSD_VDD_22_23 ((uint32_t)1 << 10) /* VDD voltage 2.2-2.3 */
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#define MMCSD_VDD_23_24 ((uint32_t)1 << 11) /* VDD voltage 2.3-2.4 */
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#define MMCSD_VDD_24_25 ((uint32_t)1 << 12) /* VDD voltage 2.4-2.5 */
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#define MMCSD_VDD_25_26 ((uint32_t)1 << 13) /* VDD voltage 2.5-2.6 */
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#define MMCSD_VDD_26_27 ((uint32_t)1 << 14) /* VDD voltage 2.6-2.7 */
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#define MMCSD_VDD_27_28 ((uint32_t)1 << 15) /* VDD voltage 2.7-2.8 */
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#define MMCSD_VDD_28_29 ((uint32_t)1 << 16) /* VDD voltage 2.8-2.9 */
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#define MMCSD_VDD_29_30 ((uint32_t)1 << 17) /* VDD voltage 2.9-3.0 */
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#define MMCSD_VDD_30_31 ((uint32_t)1 << 18) /* VDD voltage 3.0-3.1 */
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#define MMCSD_VDD_31_32 ((uint32_t)1 << 19) /* VDD voltage 3.1-3.2 */
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#define MMCSD_VDD_32_33 ((uint32_t)1 << 20) /* VDD voltage 3.2-3.3 */
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#define MMCSD_VDD_33_34 ((uint32_t)1 << 21) /* VDD voltage 3.3-3.4 */
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#define MMCSD_VDD_34_35 ((uint32_t)1 << 22) /* VDD voltage 3.4-3.5 */
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#define MMCSD_VDD_35_36 ((uint32_t)1 << 23) /* VDD voltage 3.5-3.6 */
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#define MMCSD_R3_HIGHCAPACITY ((uint32_t)1 << 30) /* true: Card supports block addressing */
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#define MMCSD_CARD_BUSY ((uint32_t)1 << 31) /* Card power-up busy bit */
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#define MMCSD_R3_STDCAPACITY ((uint32_t)0)
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/* R6 Card Status bit definitions */
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#define MMCSD_R6_RCA_SHIFT (16) /* New published RCA */
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#define MMCSD_R6_RCA_MASK ((uint32_t)0xffff << MMCSD_R6_RCA_SHIFT)
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#define MMCSD_R6_COMCRCERROR ((uint32_t)1 << 15) /* CRC error */
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#define MMCSD_R6_ILLEGALCOMMAND ((uint32_t)1 << 14) /* Bad command */
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#define MMCSD_R6_ERROR ((uint32_t)1 << 13) /* General error */
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#define MMCSD_R6_STATE_SHIFT (9) /* Current card state */
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#define MMCSD_R6_STATE_MASK ((uint32_t)15 << MMCSD_R6_STATE_SHIFT)
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/* Card identification mode states */
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# define MMCSD_R6_STATE_IDLE ((uint32_t)0 << MMCSD_R6_STATE_SHIFT) /* 0=Idle state */
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# define MMCSD_R6_STATE_READY ((uint32_t)1 << MMCSD_R6_STATE_SHIFT) /* 1=Ready state */
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# define MMCSD_R6_STATE_IDENT ((uint32_t)2 << MMCSD_R6_STATE_SHIFT) /* 2=Identification state */
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/* Data transfer states */
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# define MMCSD_R6_STATE_STBY ((uint32_t)3 << MMCSD_R6_STATE_SHIFT) /* 3=Standby state */
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# define MMCSD_R6_STATE_TRAN ((uint32_t)4 << MMCSD_R6_STATE_SHIFT) /* 4=Transfer state */
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# define MMCSD_R6_STATE_DATA ((uint32_t)5 << MMCSD_R6_STATE_SHIFT) /* 5=Sending data state */
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# define MMCSD_R6_STATE_RCV ((uint32_t)6 << MMCSD_R6_STATE_SHIFT) /* 6=Receiving data state */
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# define MMCSD_R6_STATE_PRG ((uint32_t)7 << MMCSD_R6_STATE_SHIFT) /* 7=Programming state */
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# define MMCSD_R6_STATE_DIS ((uint32_t)8 << MMCSD_R6_STATE_SHIFT) /* 8=Disconnect state */
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#define MMCSD_R6_ERRORMASK ((uint32_t)0x0000e000) /* Error mask */
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/* SD Configuration Register (SCR) encoding */
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#define MMCSD_SCR_BUSWIDTH_1BIT (1)
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#define MMCSD_SCR_BUSWIDTH_2BIT (2)
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#define MMCSD_SCR_BUSWIDTH_4BIT (4)
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#define MMCSD_SCR_BUSWIDTH_8BIT (8)
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/* Last 4 bytes of the 48-bit R7 response */
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#define MMCSD_R7VERSION_SHIFT (28) /* Bits 28-31: Command version number */
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#define MMCSD_R7VERSION_MASK ((uint32_t)0x0f << MMCSD_R7VERSION_SHIFT)
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#define MMCSD_R7VOLTAGE_SHIFT (8) /* Bits 8-11: Voltage accepted */
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#define MMCSD_R7VOLTAGE_MASK ((uint32_t)0x0f << MMCSD_R7VOLTAGE_SHIFT)
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# define MMCSD_R7VOLTAGE_27 ((uint32_t)0x01 << MMCSD_R7VOLTAGE_SHIFT) /* 2.7-3.6V */
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#define MMCSD_R7ECHO_SHIFT (0) /* Bits 0-7: Echoed check pattern */
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#define MMCSD_R7ECHO_MASK ((uint32_t)0xff << MMCSD_R7ECHO_SHIFT)
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# define MMCSD_R7CHECKPATTERN ((uint32_t)0xaa << MMCSD_R7ECHO_SHIFT)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* Decoded Card Identification (CID) register */
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struct mmcsd_cid_s
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{
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uint8_t mid; /* 127:120 8-bit Manufacturer ID */
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uint8_t cbx; /* 113:112 2-bit Device/BGA */
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uint8_t oid; /* 111:104 8-bit OEM/Application ID (ascii) */
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uint8_t pnm[7]; /* 103:56 48-bit Product Name (ascii) + null terminator */
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uint8_t prv; /* 55:48 8-bit Product revision */
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uint32_t psn; /* 47:16 32-bit Product serial number */
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uint8_t mdt; /* 15:8 8-bit Manufacturing date */
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uint8_t crc; /* 7:1 7-bit CRC7 */
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/* 0:0 1-bit (not used) */
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};
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/* Decoded Card Specific Data (CSD) register */
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struct mmcsd_csd_s
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{
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uint8_t csdstructure; /* 127:126 CSD structure */
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uint8_t mmcspecvers; /* 125:122 MMC Spec version (MMC only) */
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struct
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{
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uint8_t timeunit; /* 2:0 Time exponent */
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uint8_t timevalue; /* 6:3 Time mantissa */
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} taac; /* 119:112 Data read access-time-1 */
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uint8_t nsac; /* 111:104 Data read access-time-2 in CLK cycle(NSAC*100) */
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struct
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{
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uint8_t transferrateunit; /* 2:0 Rate exponent */
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uint8_t timevalue; /* 6:3 Rate mantissa */
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} transpeed; /* 103:96 Max. data transfer rate */
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uint16_t ccc; /* 95:84 Card command classes */
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uint8_t readbllen; /* 83:80 Max. read data block length */
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uint8_t readblpartial; /* 79:79 Partial blocks for read allowed */
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uint8_t writeblkmisalign; /* 78:78 Write block misalignment */
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uint8_t readblkmisalign; /* 77:77 Read block misalignment */
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uint8_t dsrimp; /* 76:76 DSR implemented */
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union
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{
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#ifdef CONFIG_MMCSD_MMCSUPPORT
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struct
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{
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uint16_t csize; /* 73:62 Device size */
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uint8_t vddrcurrmin; /* 61:59 Max. read current at Vdd min */
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uint8_t vddrcurrmax; /* 58:56 Max. read current at Vdd max */
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uint8_t vddwcurrmin; /* 55:53 Max. write current at Vdd min */
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uint8_t vddwcurrmax; /* 52:50 Max. write current at Vdd max */
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uint8_t csizemult; /* 49:47 Device size multiplier */
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union
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{
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struct /* MMC system specification version 3.1 */
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{
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uint8_t ergrpsize; /* 46:42 Erase group size (MMC 3.1) */
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uint8_t ergrpmult; /* 41:37 Erase group multiplier (MMC 3.1) */
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} mmc31;
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struct /* MMC system specification version 2.2 */
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{
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uint8_t sectorsize; /* 46:42 Erase sector size (MMC 2.2) */
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uint8_t ergrpsize; /* 41:37 Erase group size (MMC 2.2) */
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} mmc22;
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} er;
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uint8_t mmcwpgrpsize; /* 36:32 Write protect group size (MMC) */
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} mmc;
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#endif
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struct
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{
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uint16_t csize; /* 73:62 Device size */
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uint8_t vddrcurrmin; /* 61:59 Max. read current at Vdd min */
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uint8_t vddrcurrmax; /* 58:56 Max. read current at Vdd max */
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uint8_t vddwcurrmin; /* 55:53 Max. write current at Vdd min */
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uint8_t vddwcurrmax; /* 52:50 Max. write current at Vdd max */
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uint8_t csizemult; /* 49:47 Device size multiplier */
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uint8_t sderblen; /* 46:46 Erase single block enable (SD) */
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uint8_t sdsectorsize; /* 45:39 Erase sector size (SD) */
|
|
uint8_t sdwpgrpsize; /* 38:32 Write protect group size (SD) */
|
|
} sdbyte;
|
|
|
|
struct
|
|
{
|
|
/* 73:70 (reserved) */
|
|
|
|
uint32_t csize; /* 69:48 Device size */
|
|
/* 47:47 (reserved) */
|
|
uint8_t sderblen; /* 46:46 Erase single block enable (SD) */
|
|
uint8_t sdsectorsize; /* 45:39 Erase sector size (SD) */
|
|
uint8_t sdwpgrpsize; /* 38:32 Write protect group size (SD) */
|
|
} sdblock;
|
|
} u;
|
|
|
|
uint8_t wpgrpen; /* 31:31 Write protect group enable */
|
|
uint8_t mmcdfltecc; /* 30:29 Manufacturer default ECC (MMC) */
|
|
uint8_t r2wfactor; /* 28:26 Write speed factor */
|
|
uint8_t writebllen; /* 25:22 Max. write data block length */
|
|
uint8_t writeblpartial; /* 21:21 Partial blocks for write allowed */
|
|
uint8_t fileformatgrp; /* 15:15 File format group */
|
|
uint8_t copy; /* 14:14 Copy flag (OTP) */
|
|
uint8_t permwriteprotect; /* 13:13 Permanent write protection */
|
|
uint8_t tmpwriteprotect; /* 12:12 Temporary write protection */
|
|
uint8_t fileformat; /* 10:11 File format */
|
|
uint8_t mmcecc; /* 9:8 ECC (MMC) */
|
|
uint8_t crc; /* 7:1 CRC */
|
|
/* 0:0 Not used */
|
|
};
|
|
|
|
struct mmcsd_scr_s
|
|
{
|
|
uint8_t scrversion; /* 63:60 Version of SCR structure */
|
|
uint8_t sdversion; /* 59:56 SD memory card physical layer version */
|
|
uint8_t erasestate; /* 55:55 Data state after erase (1 or 0) */
|
|
uint8_t security; /* 54:52 SD security support */
|
|
uint8_t buswidth; /* 51:48 DAT bus widths supported */
|
|
/* 47:32 SD reserved space */
|
|
uint32_t mfgdata; /* 31:0 Reserved for manufacturing data */
|
|
};
|
|
|
|
/****************************************************************************
|
|
* Public Data
|
|
****************************************************************************/
|
|
|
|
#undef EXTERN
|
|
#if defined(__cplusplus)
|
|
#define EXTERN extern "C"
|
|
extern "C"
|
|
{
|
|
#else
|
|
#define EXTERN extern
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Public Functions Definitions
|
|
****************************************************************************/
|
|
|
|
#undef EXTERN
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
#endif /* __DRIVERS_MMCSD_MMCSD_SDIO_H */
|