588 lines
17 KiB
C
588 lines
17 KiB
C
/****************************************************************************
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* drivers/spi/qspi_flash.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <string.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/spi/qspi_flash.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Define the FLASH SIZE in bytes */
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#ifdef CONFIG_QSPI_FLASH_1M
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# define CONFIG_QSPI_FLASH_SIZE (128 * 1024)
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# define CONFIG_QSPI_FLASH_CAPACITY 0x11
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#ifndef CONFIG_QSPI_FLASH_SECTORSIZE
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# define CONFIG_QSPI_FLASH_SECTORSIZE 2048
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#endif
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#endif
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#ifdef CONFIG_QSPI_FLASH_8M
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# define CONFIG_QSPI_FLASH_SIZE (1024 * 1024)
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# define CONFIG_QSPI_FLASH_CAPACITY 0x14
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#endif
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#ifdef CONFIG_QSPI_FLASH_32M
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# define CONFIG_QSPI_FLASH_SIZE (4 * 1024 * 1024)
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# define CONFIG_QSPI_FLASH_CAPACITY 0x16
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#endif
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#ifdef CONFIG_QSPI_FLASH_64M
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# define CONFIG_QSPI_FLASH_SIZE (8 * 1024 * 1024)
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# define CONFIG_QSPI_FLASH_CAPACITY 0x17
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#endif
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#ifdef CONFIG_QSPI_FLASH_128M
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# define CONFIG_QSPI_FLASH_SIZE (16 * 1024 * 1024)
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# define CONFIG_QSPI_FLASH_CAPACITY 0x18
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#endif
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#ifndef CONFIG_QSPI_FLASH_MANUFACTURER
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# define CONFIG_QSPI_FLASH_MANUFACTURER 0x20
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#endif
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#ifndef CONFIG_QSPI_FLASH_MEMORY_TYPE
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# define CONFIG_QSPI_FLASH_MEMORY_TYPE 0xba
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#endif
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#ifndef CONFIG_QSPI_FLASH_SECTORSIZE
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# define CONFIG_QSPI_FLASH_SECTORSIZE 65536
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#endif
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#ifndef CONFIG_QSPI_FLASH_SUBSECTORSIZE
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# define CONFIG_QSPI_FLASH_SUBSECTORSIZE 4096
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#endif
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#ifndef CONFIG_QSPI_FLASH_SECTORSIZE_MASK
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# define CONFIG_QSPI_FLASH_SECTORSIZE_MASK (~(CONFIG_QSPI_FLASH_SECTORSIZE-1))
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#endif
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#ifndef CONFIG_QSPI_FLASH_SUBSECTORSIZE_MASK
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# define CONFIG_QSPI_FLASH_SUBSECTORSIZE_MASK (~(CONFIG_QSPI_FLASH_SUBSECTORSIZE-1))
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#endif
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#ifndef CONFIG_QSPI_FLASH_PAGESIZE
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# define CONFIG_QSPI_FLASH_PAGESIZE 256
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#endif
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#ifndef CONFIG_QSPI_FLASH_PAGESIZE_MASK
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# define CONFIG_QSPI_FLASH_PAGESIZE_MASK (CONFIG_QSPI_FLASH_PAGESIZE-1)
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#endif
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/* Define FLASH States */
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#define QSPI_FLASH_STATE_IDLE 0
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#define QSPI_FLASH_STATE_RDID1 1
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#define QSPI_FLASH_STATE_RDID2 2
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#define QSPI_FLASH_STATE_RDID3 3
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#define QSPI_FLASH_STATE_WREN 4
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#define QSPI_FLASH_STATE_RDSR 5
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#define QSPI_FLASH_STATE_SE1 6
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#define QSPI_FLASH_STATE_SE2 7
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#define QSPI_FLASH_STATE_SE3 8
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#define QSPI_FLASH_STATE_PP1 9
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#define QSPI_FLASH_STATE_PP2 10
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#define QSPI_FLASH_STATE_PP3 11
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#define QSPI_FLASH_STATE_PP4 12
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#define QSPI_FLASH_STATE_READ1 13
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#define QSPI_FLASH_STATE_READ2 14
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#define QSPI_FLASH_STATE_READ3 15
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#define QSPI_FLASH_STATE_READ4 16
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#define QSPI_FLASH_STATE_FREAD_WAIT 17
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/* Instructions */
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/* Command Value N Description Addr Dummy Data */
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#define QSPI_FLASH_WREN 0x06 /* 1 Write Enable 0 0 0 */
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#define QSPI_FLASH_WRDI 0x04 /* 1 Write Disable 0 0 0 */
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#define QSPI_FLASH_RDID 0x9f /* 1 Read Identification 0 0 1-3 */
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#define QSPI_FLASH_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */
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#define QSPI_FLASH_WRSR 0x01 /* 1 Write Status Register 0 0 1 */
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#define QSPI_FLASH_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */
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#define QSPI_FLASH_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */
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#define QSPI_FLASH_PP 0x02 /* 1 Page Program 3 0 1-256 */
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#define QSPI_FLASH_SE 0xd8 /* 1 Sector Erase 3 0 0 */
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#define QSPI_FLASH_BE 0xc7 /* 1 Bulk Erase 0 0 0 */
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#define QSPI_FLASH_DP 0xb9 /* 2 Deep power down 0 0 0 */
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#define QSPI_FLASH_RES 0xab /* 2 Read Electronic
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* Signature 0 3 >=1 */
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#define QSPI_FLASH_SSE 0x20 /* 3 Sub-Sector Erase 0 0 0 */
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#define QSPI_FLASH_ID 0x9f /* JEDEC ID */
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#define QSPI_FLASH_READ_QUAD 0xeb
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#define QSPI_FLASH_DUMMY 0xa5
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#define QSPI_FLASH_WREN_SET 0x02
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct qspi_flashdev_s
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{
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struct qspi_dev_s spidev; /* Externally visible part of the SPI interface */
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uint32_t selected; /* SPIn base address */
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int wren;
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int state;
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uint16_t read_data;
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uint8_t last_cmd;
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unsigned long address;
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unsigned char data[CONFIG_QSPI_FLASH_SIZE];
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* QSPI methods */
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static int qspi_flash_lock(FAR struct qspi_dev_s *dev, bool lock);
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static uint32_t qspi_flash_setfrequency(FAR struct qspi_dev_s *dev,
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uint32_t frequency);
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static void qspi_flash_setmode(FAR struct qspi_dev_s *dev,
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enum qspi_mode_e mode);
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static void qspi_flash_setbits(FAR struct qspi_dev_s *dev, int nbits);
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static int qspi_flash_command(FAR struct qspi_dev_s *dev,
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FAR struct qspi_cmdinfo_s *cmd);
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static int qspi_flash_memory(FAR struct qspi_dev_s *dev,
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FAR struct qspi_meminfo_s *mem);
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static FAR void *qspi_flash_alloc(FAR struct qspi_dev_s *dev,
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size_t buflen);
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static void qspi_flash_free(FAR struct qspi_dev_s *dev,
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FAR void *buffer);
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static void qspi_flash_writeword(FAR struct qspi_flashdev_s *priv,
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uint16_t data,
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FAR struct qspi_cmdinfo_s *cmdinfo);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct qspi_ops_s g_qspiops =
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{
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qspi_flash_lock, /* lock */
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qspi_flash_setfrequency, /* setfrequency */
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qspi_flash_setmode, /* setmode */
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qspi_flash_setbits, /* setbits */
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qspi_flash_command, /* command */
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qspi_flash_memory, /* memory */
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qspi_flash_alloc, /* alloc */
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qspi_flash_free /* free */
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};
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struct qspi_flashdev_s g_qspidev =
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{
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{
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&g_qspiops
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}
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: qspi_flash_lock
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*
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* Description:
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* On SPI buses where there are multiple devices, it will be necessary to
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* lock SPI to have exclusive access to the buses for a sequence of
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* transfers. The bus should be locked before the chip is selected. After
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* locking the SPI bus, the caller should then also call the setfrequency,
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* setbits, and setmode methods to make sure that the SPI is properly
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* configured for the device. If the SPI bus is being shared, then it
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* may have been left in an incompatible state.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* lock - true: Lock spi bus, false: unlock SPI bus
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static int qspi_flash_lock(FAR struct qspi_dev_s *dev, bool lock)
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{
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return OK;
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}
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/****************************************************************************
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* Name: qspi_flash_memory
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*
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* Description:
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* Perform QSPI Memory transaction operations
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*
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* Returned Value:
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* Always returns zero
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*
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****************************************************************************/
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int qspi_flash_memory(FAR struct qspi_dev_s *dev,
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FAR struct qspi_meminfo_s *mem)
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{
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FAR struct qspi_flashdev_s *priv = (FAR struct qspi_flashdev_s *)dev;
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switch (mem->cmd)
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{
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case QSPI_FLASH_READ_QUAD:
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priv->wren = 0;
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memcpy(mem->buffer, &priv->data[mem->addr], mem->buflen);
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priv->address += mem->addr + mem->buflen;
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priv->state = QSPI_FLASH_STATE_IDLE;
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break;
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case QSPI_FLASH_PP:
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if (priv->wren)
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{
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memcpy(&priv->data[mem->addr], mem->buffer, mem->buflen);
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}
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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/****************************************************************************
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* Name: qspi_flash_setfrequency
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*
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* Description:
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* Set the SPI frequency.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* frequency - The SPI frequency requested
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*
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* Returned Value:
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* Returns the actual frequency selected
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*
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****************************************************************************/
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static uint32_t qspi_flash_setfrequency(FAR struct qspi_dev_s *dev,
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uint32_t frequency)
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{
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return frequency;
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}
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/****************************************************************************
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* Name: qspi_flash_setmode
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*
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* Description:
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* Set the SPI mode. see enum spi_mode_e for mode definitions
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*
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* Input Parameters:
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* dev - Device-specific state data
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* mode - The SPI mode requested
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*
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* Returned Value:
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* Returns the actual frequency selected
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*
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****************************************************************************/
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static void qspi_flash_setmode(FAR struct qspi_dev_s *dev,
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enum qspi_mode_e mode)
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{
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}
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/****************************************************************************
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* Name: qspi_flash_setbits
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*
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* Description:
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* Set the number of bits per word.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* nbits - The number of bits requested
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void qspi_flash_setbits(FAR struct qspi_dev_s *dev, int nbits)
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{
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}
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/****************************************************************************
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* Name: qspi_flash_alloc
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*
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* Description:
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* Allocate a buffer and associate it with the QSPI device
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*
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* Input Parameters:
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* dev - Device-specific state data
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* buflen - Length of buffer to allocate
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static FAR void *qspi_flash_alloc(FAR struct qspi_dev_s *dev, size_t buflen)
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{
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return kmm_malloc(buflen);
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}
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/****************************************************************************
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* Name: qspi_flash_free
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*
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* Description:
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* Allocate a buffer and associate it with the QSPI device
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*
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* Input Parameters:
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* dev - Device-specific state data
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* buflen - Length of buffer to allocate
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void qspi_flash_free(FAR struct qspi_dev_s *dev, FAR void *buffer)
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{
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kmm_free(buffer);
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}
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/****************************************************************************
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* Name: qspi_flash_sectorerase
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*
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* Description:
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* Erase one sector
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*
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* Input Parameters:
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* priv - Device-specific state data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void qspi_flash_sectorerase(FAR struct qspi_flashdev_s *priv)
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{
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uint32_t address;
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uint32_t len = 0;
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/* Ensure the WREN bit is set before any erase operation */
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if (priv->wren)
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{
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address = priv->address;
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if (priv->last_cmd == QSPI_FLASH_SE)
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{
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address &= CONFIG_QSPI_FLASH_SECTORSIZE_MASK;
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len = CONFIG_QSPI_FLASH_SECTORSIZE;
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}
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else if (priv->last_cmd == QSPI_FLASH_SSE)
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{
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address &= CONFIG_QSPI_FLASH_SUBSECTORSIZE_MASK;
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len = CONFIG_QSPI_FLASH_SUBSECTORSIZE;
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}
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/* Now perform the erase */
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memset(&priv->data[address], 0xff, len);
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}
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}
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/****************************************************************************
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* Name: qspi_flash_writeword
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*
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* Description:
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* Write a word (byte in our case) to the FLASH state machine.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* data - the data to send to the simulated FLASH
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void qspi_flash_writeword(FAR struct qspi_flashdev_s *priv,
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uint16_t data,
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FAR struct qspi_cmdinfo_s *cmdinfo)
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{
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switch (priv->state)
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{
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case QSPI_FLASH_STATE_IDLE:
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priv->last_cmd = data;
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priv->read_data = 0xff;
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switch (data)
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{
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case QSPI_FLASH_WREN:
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priv->wren = 1;
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break;
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case QSPI_FLASH_WRDI:
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priv->wren = 0;
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break;
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/* Sector / Subsector erase */
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case QSPI_FLASH_SE:
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case QSPI_FLASH_SSE:
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priv->address = cmdinfo->addr;
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/* Now perform the sector or sub-sector erase.
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* Really this should be done during the deselect,
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* but this is just a simulation .
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*/
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qspi_flash_sectorerase(priv);
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break;
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/* Bulk Erase */
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case QSPI_FLASH_BE:
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priv->state = QSPI_FLASH_STATE_IDLE;
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if (priv->wren)
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{
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memset(priv->data, 0xff, CONFIG_QSPI_FLASH_SIZE);
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}
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break;
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default:
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break;
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}
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break;
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default:
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priv->state = QSPI_FLASH_STATE_IDLE;
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priv->read_data = 0xff;
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break;
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}
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}
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/****************************************************************************
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* Name: qspi_flash_command
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*
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* Description:
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* Perform QSPI Command operations
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*
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* Returned Value:
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* Always returns zero
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*
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****************************************************************************/
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static int qspi_flash_command(FAR struct qspi_dev_s *dev,
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FAR struct qspi_cmdinfo_s *cmdinfo)
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{
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FAR uint8_t *p_buf;
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FAR struct qspi_flashdev_s *priv = (FAR struct qspi_flashdev_s *)dev;
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DEBUGASSERT(cmdinfo->cmd < 256);
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/* Does data accompany the command? */
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if (QSPICMD_ISDATA(cmdinfo->flags))
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{
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DEBUGASSERT(cmdinfo->buffer != NULL && cmdinfo->buflen > 0);
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p_buf = (FAR uint8_t *)cmdinfo->buffer;
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/* Read or write operation? */
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if (QSPICMD_ISWRITE(cmdinfo->flags))
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{
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/* Write data operation */
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qspi_flash_writeword(priv, cmdinfo->cmd, cmdinfo);
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}
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else
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{
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/* Read data operation */
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switch (cmdinfo->cmd)
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{
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case QSPI_FLASH_ID:
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p_buf[0] = CONFIG_QSPI_FLASH_MANUFACTURER;
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p_buf[1] = CONFIG_QSPI_FLASH_MEMORY_TYPE;
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p_buf[2] = CONFIG_QSPI_FLASH_CAPACITY;
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break;
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case QSPI_FLASH_RDSR:
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p_buf[0] = priv->wren == 1 ? QSPI_FLASH_WREN_SET : 0;
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break;
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}
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}
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}
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else
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{
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/* Write data operation */
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qspi_flash_writeword(priv, cmdinfo->cmd, cmdinfo);
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}
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: qspi_flash_initialize
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*
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* Description:
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* Initialize the selected SPI port
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*
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* Returned Value:
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* Valid SPI device structure reference on success; a NULL on failure
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*
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****************************************************************************/
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FAR struct qspi_dev_s *qspi_flash_initialize()
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{
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FAR struct qspi_flashdev_s *priv = NULL;
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priv = &g_qspidev;
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priv->selected = 0;
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priv->wren = 0;
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priv->address = 0;
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priv->state = QSPI_FLASH_STATE_IDLE;
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priv->read_data = 0xff;
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priv->last_cmd = 0xff;
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memset(&priv->data[0], 0xff, sizeof(priv->data));
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return (FAR struct qspi_dev_s *)priv;
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}
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