135 lines
4.8 KiB
C
135 lines
4.8 KiB
C
/************************************************************************************
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* arch/arm/src/stm32h7/stm32_pwr.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32H7_STM32_PWR_H
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#define __ARCH_ARM_SRC_STM32H7_STM32_PWR_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include "chip.h"
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#include "hardware/stm32_pwr.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_pwr_initbkp
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*
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* Description:
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* Insures the referenced count access to the backup domain (RTC registers,
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* RTC backup data registers and backup SRAM is consistent with the HW state
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* without relying on a variable.
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*
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* NOTE: This function should only be called by SoC Start up code.
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*
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* Input Parameters:
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* writable - set the initial state of the enable and the
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* bkp_writable_counter
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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void stm32_pwr_initbkp(bool writable);
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/************************************************************************************
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* Name: stm32_pwr_enablebkp
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*
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* Description:
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* Enables access to the backup domain (RTC registers, RTC backup data registers
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* and backup SRAM).
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*
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* Input Parameters:
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* writable - True: enable ability to write to backup domain registers
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*
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* Returned Value:
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* none
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*
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************************************************************************************/
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void stm32_pwr_enablebkp(bool writable);
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/************************************************************************************
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* Name: stm32_pwr_enablebreg
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*
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* Description:
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* Enables the Backup regulator, the Backup regulator (used to maintain backup
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* SRAM content in Standby and VBAT modes) is enabled. If BRE is reset, the backup
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* regulator is switched off. The backup SRAM can still be used but its content will
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* be lost in the Standby and VBAT modes. Once set, the application must wait that
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* the Backup Regulator Ready flag (BRR) is set to indicate that the data written
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* into the RAM will be maintained in the Standby and VBAT modes.
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*
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* Input Parameters:
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* region - state to set it to
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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void stm32_pwr_enablebreg(bool region);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32H7_STM32_PWR_H */
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