Ville Juven 9be93addea mpfs/mpfs_corespi: Several speed optimizations to the FPGA driver ... This is a collection of tweaks / optimizations to the driver to limit CPU usage as well as interrupt processing times. The changes are as follows: - setfrequency is now no-op if the frequency does not change. Accessing MPFS_SPI_CONTROL requires synchronization to the FIC domain, which takes unnecessary time if nothing changes - load/unload FIFO loops optimized so !buffer, priv->nbits and i==last are only tested once (instead of for every word written in loop). - Disable the RX interrupt only once (again, FIC domain access is slow) - In case a spurious MPFS_SPI_DATA_RX interrupt arrives, just wipe the whole RX FIFO, instead of trying to read it byte-by-byte		2023-09-28 09:36:07 +08:00
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include	arch/risc-v: Add support for StarFive JH7110 SoC	2023-08-03 22:55:55 -07:00
src	mpfs/mpfs_corespi: Several speed optimizations to the FPGA driver	2023-09-28 09:36:07 +08:00
Kconfig	risc-v/litex: Add system reset and access to core control registers.	2023-08-25 17:16:28 +08:00