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9d4549d48b
nuttx/arch/risc-v/include
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Xiang Xiao 9ab3417882 arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place 
1.Move __XSTR from include/arch.h to include/irq.h
2.Move  FLOAD/FSTORE and REGLOAD/REGSTORE from include/arch.h to src/common/riscv_internal.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:25:56 +03:00
..
bl602 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
c906 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
esp32c3 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
fe310 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
k210 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
litex arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
mpfs arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
qemu-rv arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
rv32m1 arch: Remove the inclusion of arch/irq.h from chip/irq.h 2022-07-04 13:03:47 +03:00
.gitignore
arch.h arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place 2022-07-04 13:25:56 +03:00
barriers.h RISC-V: Add common data memory and instruction barriers 2022-03-18 18:20:12 +08:00
csr.h arch/riscv: Align the macro definition in csr.h 2022-04-02 14:08:37 +03:00
elf.h
inttypes.h arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64 2022-01-04 23:22:43 +08:00
irq.h arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place 2022-07-04 13:25:56 +03:00
limits.h arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h 2022-06-03 22:25:49 +03:00
mode.h arch/riscv: Access [m|s]scratch through CSR_SCRATCH macro 2022-04-02 14:08:37 +03:00
setjmp.h arch/risc-v: Save/Load float register in setjmp 2022-03-09 10:15:54 +02:00
spinlock.h arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64 2022-01-04 23:22:43 +08:00
stdarg.h
syscall.h arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place 2022-07-04 13:25:56 +03:00
types.h arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64 2022-01-04 23:22:43 +08:00