nuttx/boards/arm/stm32f0l0g0/stm32f072-discovery
Xiang Xiao 9ec9431706 build: Move DIRLINK/DIRUNLINK definition to common place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-19 19:23:18 +01:00
..
configs/nsh Fix up some problems/issues remaining from PR 1007 2020-05-08 20:13:40 +01:00
include Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
scripts build: Move DIRLINK/DIRUNLINK definition to common place 2020-05-19 19:23:18 +01:00
src Fix typos 2020-05-14 10:49:44 -06:00
Kconfig Merged in alinjerpelea/nuttx (pull request #967) 2019-08-07 20:49:39 +00:00
README.txt Merged in alinjerpelea/nuttx (pull request #967) 2019-08-07 20:49:39 +00:00

STATUS
======

05/17: The basic NSH configuration is functional and shows that there is
       3-4KB of free heap space.  However, attempts to extend this have
       failed.  I suspect that 8KB of SRAM is insufficient to do much
       with the existing NSH configuration.  Perhaps some fine tuning
       can improve this situation but at this point, I think this board
       is only useful for the initial STM32 F0 bring-up, perhaps for
       embedded solutions that do not use NSH and for general
       experimentation.

       There is also support for the Nucleo boards with the STM32 F072
       and F092 MCUs.  Those ports do not suffer from these problems and
       seem to work well in fairly complex configurations.  Apparently 8KB
       is SRAM is not usable but the parts with larger 16KB and 32KB SRAMs
       are better matches.