Gregory Nutt e6a3078b77 Add support for a generic windows-based EABI toolchain; Add NX configuration to force default NXTK border colors

2013-06-13 11:04:18 -06:00

..

exc_return.h

More Cortex-M0/NUC120 fixes

2013-02-25 18:36:25 +00:00

Kconfig

Add support for a generic windows-based EABI toolchain; Add NX configuration to force default NXTK border colors

2013-06-13 11:04:18 -06:00

nvic.h

Correct some ARMv6-M NVIC addresses

2013-02-27 16:19:07 +00:00

psr.h

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

svcall.h

Add support for calling to and returning from signal handlers in in user-mode threads

2013-03-17 00:40:49 +00:00

Toolchain.defs

Add support for a generic windows-based EABI toolchain; Add NX configuration to force default NXTK border colors

2013-06-13 11:04:18 -06:00

up_assert.c

Remove up_assert_code

2013-04-25 15:19:59 -06:00

up_blocktask.c

Remove up_assert_code

2013-04-25 15:19:59 -06:00

up_copystate.c

Fixes for NuTiny-NUC120 configuration and build

2013-02-23 15:04:49 +00:00

up_doirq.c

Remove up_assert_code

2013-04-25 15:19:59 -06:00

up_dumpnvic.c

Correct some ARMv6-M NVIC addresses

2013-02-27 16:19:07 +00:00

up_elf.c

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

up_exception.S

Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register

2013-04-16 18:00:59 -06:00

up_fullcontextrestore.S

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

up_hardfault.c

Remove up_assert_code

2013-04-25 15:19:59 -06:00

up_initialstate.c

Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register

2013-04-16 18:00:59 -06:00

up_releasepending.c

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

up_reprioritizertr.c

Remove up_assert_code

2013-04-25 15:19:59 -06:00

up_saveusercontext.S

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

up_schedulesigaction.c

Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register

2013-04-16 18:00:59 -06:00

up_sigdeliver.c

Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register

2013-04-16 18:00:59 -06:00

up_signal_handler.S

Rework of kernel build signal dispatch to user-space handlers

2013-03-23 14:46:02 +00:00

up_svcall.c

Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register

2013-04-16 18:00:59 -06:00

up_switchcontext.S

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

up_systemreset.c

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

up_unblocktask.c

Remove up_assert_code

2013-04-25 15:19:59 -06:00

up_vectors.c

First cut at support for Cortex-M0

2013-02-16 16:32:19 +00:00

vfork.S

Cortex-M0/NUC120 now passes OS test; calibration NuTiny-NUC120 delay loop

2013-02-26 20:53:21 +00:00