6a539b0a93
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4913 42af7a65-404d-4744-a932-0658087f49c3
141 lines
6.0 KiB
C
141 lines
6.0 KiB
C
/************************************************************************************
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* arch/arm/src/lpc43xx/lpc43_gpioint.h
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* GPIO pin interrupts
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*
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* From all available GPIO pins, up to eight pins can be selected in the system
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* control block to serve as external interrupt pins. The external interrupt pins
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* are connected to eight individual interrupts in the NVIC and are created based
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* on rising or falling edges or on the input level on the pin.
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*
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* GPIO group interrupt
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*
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* For each port/pin connected to one of the two the GPIO Grouped Interrupt blocks
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* (GROUP0 and GROUP1), the GPIO grouped interrupt registers determine which pins are
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* enabled to generate interrupts and what the active polarities of each of those
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* inputs are. The GPIO grouped interrupt registers also select whether the interrupt
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* output will be level or edge triggered and whether it will be based on the OR or
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* the AND of all of the enabled inputs.
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*/
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#ifndef __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H
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#define __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "chip/lpc43_gpio.h"
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#ifdef CONFIG_GPIO_IRQ
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Name: lpc43_gpioint_grpinitialize
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*
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* Description:
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* Initialize the properties of a GPIO group. The properties of the group
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* should be configured before any pins are added to the group by
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* lpc32_gpioint_grpconfig(). As side effects, this call also removes
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* all pins from the group and disables the group interrupt. On return,
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* this is a properly configured, empty GPIO interrupt group.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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* Assumptions:
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* Interrupts are disabled so that read-modify-write operations are safe.
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*
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****************************************************************************/
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EXTERN int lpc43_gpioint_grpinitialize(int group, bool anded, bool level);
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/****************************************************************************
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* Name: lpc43_gpioint_pinconfig
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*
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* Description:
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* Configure a GPIO pin as an GPIO pin interrupt source (after it has been
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* configured as an input). This function should *not* be called directly
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* from user application code; user code should call this function only
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* indirectly through lpc32_gpio_config().
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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* Assumptions:
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* Interrupts are disabled so that read-modify-write operations are safe.
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*
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****************************************************************************/
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EXTERN int lpc43_gpioint_pinconfig(uint16_t gpiocfg);
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/****************************************************************************
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* Name: lpc43_gpioint_grpconfig
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*
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* Description:
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* Configure a GPIO pin as an GPIO group interrupt member (after it has been
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* configured as an input). This function should *not* be called directly
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* from user application code; user code should call this function only
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* indirectly through lpc32_gpio_config().
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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* Assumptions:
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* Interrupts are disabled so that read-modify-write operations are safe.
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*
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****************************************************************************/
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EXTERN int lpc43_gpioint_grpconfig(uint16_t gpiocfg);
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#endif /* CONFIG_GPIO_IRQ */
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#endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H */
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