nuttx/boards/arm/phy62xx/phy6222
cuiziwei 4ec7af779d nuttx/boards:init_array.* needs to be executed in order
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program.

I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
2023-08-29 22:54:37 +08:00
..
configs binfmt: Change the default of BINFMT_DISABLE to DEFAULT_SMALL 2023-08-10 11:35:41 +03:00
include Indent the include statement by two spaces 2023-05-16 12:34:32 -03:00
scripts nuttx/boards:init_array.* needs to be executed in order 2023-08-29 22:54:37 +08:00
src arch/armv6-m: fix compile error on LLVM clang 2022-10-25 00:52:00 +08:00
Kconfig
README.txt

STATUS
======

05/17: The basic NSH configuration is functional and shows that there is
       3-4KB of free heap space.  However, attempts to extend this have
       failed.  I suspect that 8KB of SRAM is insufficient to do much
       with the existing NSH configuration.  Perhaps some fine tuning
       can improve this situation but at this point, I think this board
       is only useful for the initial STM32 F0 bring-up, perhaps for
       embedded solutions that do not use NSH and for general
       experimentation.

       There is also support for the Nucleo boards with the STM32 F072
       and F092 MCUs.  Those ports do not suffer from these problems and
       seem to work well in fairly complex configurations.  Apparently 8KB
       is SRAM is not usable but the parts with larger 16KB and 32KB SRAMs
       are better matches.