4e3480554d
cmd53 need a longer tolerance on some slow devices Signed-off-by: chao an <anchao@xiaomi.com>
548 lines
12 KiB
C
548 lines
12 KiB
C
/****************************************************************************
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* drivers/mmcsd/sdio.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <debug.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <string.h>
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#include <nuttx/compiler.h>
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#include <nuttx/arch.h>
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#include <nuttx/sdio.h>
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#include <nuttx/signal.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define SDIO_CMD53_TIMEOUT_MS 1000
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#define SDIO_IDLE_DELAY_MS 50
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/****************************************************************************
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* Private Types
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****************************************************************************/
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begin_packed_struct struct sdio_cmd52
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{
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uint32_t write_data : 8;
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uint32_t reserved_8 : 1;
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uint32_t register_address : 17;
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uint32_t reserved_26 : 1;
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uint32_t raw_flag : 1;
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uint32_t function_number : 3;
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uint32_t rw_flag : 1;
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} end_packed_struct;
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begin_packed_struct struct sdio_cmd53
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{
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uint32_t byte_block_count : 9;
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uint32_t register_address : 17;
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uint32_t op_code : 1;
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uint32_t block_mode : 1;
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uint32_t function_number : 3;
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uint32_t rw_flag : 1;
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} end_packed_struct;
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begin_packed_struct struct sdio_resp_r5
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{
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uint32_t data : 8;
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begin_packed_struct
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struct
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{
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uint32_t out_of_range : 1;
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uint32_t function_number : 1;
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uint32_t rfu : 1;
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uint32_t error : 1;
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uint32_t io_current_state : 2;
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uint32_t illegal_command : 1;
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uint32_t com_crc_error : 1;
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}
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end_packed_struct flags;
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uint32_t reserved_16 : 16;
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} end_packed_struct;
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union sdio_cmd5x
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{
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uint32_t value;
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struct sdio_cmd52 cmd52;
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struct sdio_cmd53 cmd53;
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static int sdio_takelock(FAR struct sdio_dev_s *dev)
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{
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int ret;
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/* Take the lock, giving exclusive access to the driver (perhaps
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* waiting)
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*/
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if (!up_interrupt_context() && !sched_idletask())
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{
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ret = nxmutex_lock(&dev->mutex);
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if (ret < 0)
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{
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return ret;
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}
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/* Lock the bus if mutually exclusive access to the
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* SDIO bus is required on this platform.
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*/
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#ifdef CONFIG_SDIO_MUXBUS
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SDIO_LOCK(dev, true);
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#endif
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}
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else
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{
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ret = OK;
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}
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return ret;
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}
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static void sdio_givelock(FAR struct sdio_dev_s *dev)
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{
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if (!up_interrupt_context() && !sched_idletask())
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{
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/* Release the SDIO bus lock, then the MMC/SD driver mutex in the
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* opposite order that they were taken to assure that no deadlock
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* conditions will arise.
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*/
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#ifdef CONFIG_SDIO_MUXBUS
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SDIO_LOCK(dev, false);
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#endif
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nxmutex_unlock(&dev->mutex);
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}
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}
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static int sdio_sendcmdpoll(FAR struct sdio_dev_s *dev,
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uint32_t cmd, uint32_t arg)
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{
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int ret;
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/* Send the command */
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ret = SDIO_SENDCMD(dev, cmd, arg);
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if (ret == OK)
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{
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/* Then poll-wait until the response is available */
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ret = SDIO_WAITRESPONSE(dev, cmd);
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if (ret != OK)
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{
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wlerr("ERROR: Wait for response to cmd: %08" PRIx32
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" failed: %d\n",
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cmd, ret);
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}
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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int sdio_io_rw_direct(FAR struct sdio_dev_s *dev, bool write,
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uint8_t function, uint32_t address,
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uint8_t inb, FAR uint8_t *outb)
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{
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union sdio_cmd5x arg;
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struct sdio_resp_r5 resp;
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uint32_t data;
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int ret;
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/* Setup CMD52 argument */
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arg.value = 0;
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if (write)
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{
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arg.cmd52.write_data = inb;
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}
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else
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{
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arg.cmd52.write_data = 0;
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}
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arg.cmd52.register_address = address & 0x1ffff;
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arg.cmd52.raw_flag = (write && outb);
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arg.cmd52.function_number = function & 7;
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arg.cmd52.rw_flag = write;
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/* Send CMD52 command */
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sdio_takelock(dev);
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sdio_sendcmdpoll(dev, SD_ACMD52, arg.value);
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ret = SDIO_RECVR5(dev, SD_ACMD52, &data);
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sdio_givelock(dev);
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if (ret != OK)
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{
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wlerr("ERROR: SDIO_RECVR5 failed %d\n", ret);
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return ret;
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}
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memcpy(&resp, &data, sizeof(resp));
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/* Check for errors */
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if (resp.flags.error)
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{
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return -EIO;
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}
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if (resp.flags.function_number || resp.flags.out_of_range)
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{
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return -EINVAL;
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}
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/* Write output byte */
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if (outb)
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{
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*outb = resp.data & 0xff;
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}
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return OK;
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}
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int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write,
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uint8_t function, uint32_t address,
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bool inc_addr, FAR uint8_t *buf,
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unsigned int blocklen, unsigned int nblocks)
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{
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union sdio_cmd5x arg;
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struct sdio_resp_r5 resp;
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uint32_t data;
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int ret;
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sdio_eventset_t wkupevent;
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/* Setup CMD53 argument */
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arg.value = 0;
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arg.cmd53.register_address = address & 0x1ffff;
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arg.cmd53.op_code = inc_addr;
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arg.cmd53.function_number = function & 7;
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arg.cmd53.rw_flag = write;
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if (nblocks == 0 && blocklen < 512)
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{
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/* Use byte mode */
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arg.cmd53.block_mode = 0;
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arg.cmd53.byte_block_count = blocklen;
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nblocks = 1;
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}
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else
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{
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/* Use block mode */
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arg.cmd53.block_mode = 1;
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arg.cmd53.byte_block_count = nblocks;
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}
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sdio_takelock(dev);
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/* Send CMD53 command */
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SDIO_BLOCKSETUP(dev, blocklen, nblocks);
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SDIO_WAITENABLE(dev,
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SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
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SDIO_CMD53_TIMEOUT_MS);
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if (write)
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{
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wlinfo("prep write %d %d\n", blocklen, nblocks);
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/* Get the capabilities of the SDIO hardware */
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if ((SDIO_CAPABILITIES(dev) & SDIO_CAPS_DMABEFOREWRITE) != 0)
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{
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SDIO_DMASENDSETUP(dev, buf, blocklen * nblocks);
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SDIO_SENDCMD(dev, SD_ACMD53WR, arg.value);
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wkupevent = SDIO_EVENTWAIT(dev);
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ret = SDIO_RECVR5(dev, SD_ACMD53WR, &data);
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}
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else
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{
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sdio_sendcmdpoll(dev, SD_ACMD53WR, arg.value);
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ret = SDIO_RECVR5(dev, SD_ACMD53WR, &data);
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SDIO_DMASENDSETUP(dev, buf, blocklen * nblocks);
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wkupevent = SDIO_EVENTWAIT(dev);
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}
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}
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else
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{
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wlinfo("prep read %d\n", blocklen * nblocks);
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SDIO_DMARECVSETUP(dev, buf, blocklen * nblocks);
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SDIO_SENDCMD(dev, SD_ACMD53RD, arg.value);
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wkupevent = SDIO_EVENTWAIT(dev);
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ret = SDIO_RECVR5(dev, SD_ACMD53RD, &data);
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}
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wlinfo("Transaction ends\n");
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sdio_sendcmdpoll(dev, SD_ACMD52ABRT, 0);
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/* There may not be a response to this, so don't look for one */
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SDIO_RECVR1(dev, SD_ACMD52ABRT, &data);
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sdio_givelock(dev);
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if (ret != OK)
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{
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wlerr("ERROR: SDIO_RECVR5 failed %d\n", ret);
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return ret;
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}
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memcpy(&resp, &data, sizeof(resp));
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/* Check for errors */
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if (wkupevent & SDIOWAIT_TIMEOUT)
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{
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wlerr("timeout\n");
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return -ETIMEDOUT;
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}
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if (resp.flags.error || (wkupevent & SDIOWAIT_ERROR))
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{
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wlerr("error 1\n");
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return -EIO;
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}
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if (resp.flags.function_number || resp.flags.out_of_range)
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{
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wlerr("error 2\n");
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return -EINVAL;
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}
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return OK;
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}
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int sdio_set_wide_bus(FAR struct sdio_dev_s *dev)
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{
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int ret;
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uint8_t value;
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/* Read Bus Interface Control register */
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ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_BUS_IF, 0, &value);
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if (ret != OK)
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{
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return ret;
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}
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/* Set 4 bits bus width setting */
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value &= ~SDIO_CCCR_BUS_IF_WIDTH_MASK;
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value |= SDIO_CCCR_BUS_IF_4_BITS;
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ret = sdio_io_rw_direct(dev, true, 0, SDIO_CCCR_BUS_IF, value, NULL);
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if (ret != OK)
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{
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return ret;
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}
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SDIO_WIDEBUS(dev, true);
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return OK;
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}
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int sdio_probe(FAR struct sdio_dev_s *dev)
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{
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int ret;
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uint32_t data = 0;
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nxmutex_init(&dev->mutex);
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sdio_takelock(dev);
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/* Set device state from reset to idle */
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ret = sdio_sendcmdpoll(dev, MMCSD_CMD0, 0);
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if (ret != OK)
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{
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goto err;
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}
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up_mdelay(SDIO_IDLE_DELAY_MS);
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/* Device is SDIO card compatible so we can send CMD5 instead of ACMD41 */
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ret = sdio_sendcmdpoll(dev, SDIO_CMD5, 0);
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if (ret != OK)
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{
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goto err;
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}
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/* Receive R4 response */
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ret = SDIO_RECVR4(dev, SDIO_CMD5, &data);
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if (ret != OK)
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{
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goto err;
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}
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/* Device is in Card Identification Mode, request device RCA */
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ret = sdio_sendcmdpoll(dev, SD_CMD3, 0);
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if (ret != OK)
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{
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goto err;
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}
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ret = SDIO_RECVR6(dev, SD_CMD3, &data);
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if (ret != OK)
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{
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wlerr("ERROR: RCA request failed: %d\n", ret);
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goto err;
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}
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wlinfo("rca is %" PRIx32 "\n", data >> 16);
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/* Send CMD7 with the argument == RCA in order to select the card
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* and put it in Transfer State.
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*/
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ret = sdio_sendcmdpoll(dev, MMCSD_CMD7S, data & 0xffff0000);
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if (ret != OK)
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{
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wlerr("ERROR: CMD7 request failed: %d\n", ret);
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goto err;
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}
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ret = SDIO_RECVR1(dev, MMCSD_CMD7S, &data);
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if (ret != OK)
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{
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wlerr("ERROR: card selection failed: %d\n", ret);
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goto err;
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}
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/* Configure 4 bits bus width */
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sdio_givelock(dev);
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return sdio_set_wide_bus(dev);
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err:
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sdio_givelock(dev);
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return ret;
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}
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int sdio_set_blocksize(FAR struct sdio_dev_s *dev, uint8_t function,
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uint16_t blocksize)
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{
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int ret;
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ret = sdio_io_rw_direct(dev, true, 0,
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(function << SDIO_FBR_SHIFT) + SDIO_CCCR_FN0_BLKSIZE_0,
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blocksize & 0xff, NULL);
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if (ret != OK)
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{
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return ret;
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}
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ret = sdio_io_rw_direct(dev, true, 0,
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(function << SDIO_FBR_SHIFT) + SDIO_CCCR_FN0_BLKSIZE_1,
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(blocksize >> 8), NULL);
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if (ret != OK)
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{
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return ret;
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}
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return OK;
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}
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int sdio_enable_function(FAR struct sdio_dev_s *dev, uint8_t function)
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{
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int ret;
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uint8_t value;
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/* Read current I/O Enable register */
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ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_IOEN, 0, &value);
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if (ret != OK)
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{
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return ret;
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}
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ret = sdio_io_rw_direct(dev, true, 0,
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SDIO_CCCR_IOEN, value | (1 << function), NULL);
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if (ret != OK)
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{
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return ret;
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}
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/* Wait 1s for function to be enabled */
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int loops = 100;
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while (loops-- > 0)
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{
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nxsig_usleep(10 * 1000);
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ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_IORDY, 0, &value);
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if (ret != OK)
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{
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return ret;
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}
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if (value & (1 << function))
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{
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/* Function enabled */
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wlinfo("Function %d enabled\n", function);
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return OK;
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}
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}
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return -ETIMEDOUT;
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}
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int sdio_enable_interrupt(FAR struct sdio_dev_s *dev, uint8_t function)
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{
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int ret;
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uint8_t value;
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/* Read current Int Enable register */
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ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_INTEN, 0, &value);
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if (ret != OK)
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{
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return ret;
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}
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return sdio_io_rw_direct(dev, true, 0,
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SDIO_CCCR_INTEN, value | (1 << function), NULL);
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}
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