It should not be an error to clean cache beyond the dma source buffer boundaries. It would just prematurely push some unrelated data from cache to memory. The only case where it would corrupt memory is that there is a dma destination buffer overlapping the same cache line with the source buffer. But this can't happen, because a destination buffer must always be cache-line aligned when using write-back cache. This patch enables doing dma tx-only transfer from unaligned source buffer when using write-back cache. Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com> |
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