208 lines
9.3 KiB
C
208 lines
9.3 KiB
C
/************************************************************************************
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* arch/z80/src/z8/chip.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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************************************************************************************/
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#ifndef __ARCH_Z80_SRC_Z8_CHIP_H
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#define __ARCH_Z80_SRC_Z8_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Hexadecimal Representation *******************************************************/
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#ifdef __ASSEMBLY__
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# define _HX(h) %##h
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#else
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# define _HX(h) 0x##h
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#endif
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/* Memory Map
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*
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* 64Kb Program Memory (64K series)
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* C:0000 - C:0001 : Flash options
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* C:0002 - C:0037 : Vectors
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* : ROM data
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* : Code
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*
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* 4Kb Register File (64K series)
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* R:020 - R:0ff : 224 byte RDATA
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* R:0e0 - R:0ef : 16-byte working register area (RDATA)
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* E:100 - E:eff : 3.5 Kbyte EDATA
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* f00 - fff : 256 byte control register area
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*/
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/* Special Function Registers *******************************************************
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*
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* Because of the many different ez80 configurations, we will rely on the
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* ZDS-II header file, ez8.h, to provide the correct addresses for each register.
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*/
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/* Timer Register Bit Definitions ***************************************************/
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/* Timer control register */
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#define Z8_TIMERCTL_TEN _HX(80) /* Bit 7: Timer enabled */
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#define Z8_TIMERCTL_TPOL _HX(40) /* Bit 6: Timer input/output polarity */
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#define Z8_TIMERCTL_DIV1 _HX(00) /* Bits 3-5: Pre-scale divisor */
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#define Z8_TIMERCTL_DIV2 _HX(08)
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#define Z8_TIMERCTL_DIV4 _HX(10)
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#define Z8_TIMERCTL_DIV8 _HX(18)
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#define Z8_TIMERCTL_DIV16 _HX(20)
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#define Z8_TIMERCTL_DIV32 _HX(28)
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#define Z8_TIMERCTL_DIV64 _HX(30)
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#define Z8_TIMERCTL_DIV128 _HX(38)
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#define Z8_TIMERCTL_ONESHOT _HX(00) /* Bits 0-2: Timer mode */
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#define Z8_TIMERCTL_CONT _HX(01)
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#define Z8_TIMERCTL_COUNTER _HX(02)
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#define Z8_TIMERCTL_PWM _HX(03)
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#define Z8_TIMERCTL_CAPTURE _HX(04)
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#define Z8_TIMERCTL_COMPARE _HX(05)
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#define Z8_TIMERCTL_GATED _HX(06)
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#define Z8_TIMERCTL_CAPCMP _HX(07)
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/* UART Register Offsets ************************************************************/
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#define Z8_UART_TXD _HX(00) /* 8-bits: UART Transmit Data */
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#define Z8_UART_RXD _HX(00) /* 8-bits: UART Receive Data */
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#define Z8_UART_STAT0 _HX(01) /* 8-bits: UART Status 0 */
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#define Z8_UART_CTL _HX(02) /* 16-bits: UART Control */
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#define Z8_UART_CTL0 _HX(02) /* 8-bits: UART Control 0 */
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#define Z8_UART_CTL1 _HX(03) /* 8-bits: UART COntrol 1 */
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#if defined(_Z8FMC16) || defined(_Z8F1680)
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# define Z8_UART_MDSTAT _HX(04) /* 8-bits: UART Mode Select & Status */
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#else
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# define Z8_UART_STAT1 _HX(04) /* 8-bits: UART Status 1 */
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#endif
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#define Z8_UART_ADDR _HX(05) /* 8-bits: UART Address Compare */
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#define Z8_UART_BR _HX(06) /* 16-bits: UART Baud Rate */
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#define Z8_UART_BRH _HX(06) /* 8-bits: UART Baud Rate High Byte */
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#define Z8_UART_BRL _HX(07) /* 8-bits: UART Baud Rate Low Byte */
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/* UART0/1 Base Register Addresses **************************************************/
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#ifdef EZ8_UART0
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# define Z8_UART0_BASE ((uint8_t volatile far*)0xf40)
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#endif
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#ifdef EZ8_UART1
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# define Z8_UART1_BASE ((uint8_t volatile far*)0xf48)
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#endif
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/* UART0/1 Status 0 Register Bit Definitions ****************************************/
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#define Z8_UARTSTAT0_RDA _HX(80) /* Bit 7: Receive Data Available */
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#define Z8_UARTSTAT0_PE _HX(40) /* Bit 6: Parity Error */
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#define Z8_UARTSTAT0_OE _HX(20) /* Bit 5: Overrun Error */
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#define Z8_UARTSTAT0_FE _HX(10) /* Bit 4: Framing Error */
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#define Z8_UARTSTAT0_BRKD _HX(08) /* Bit 3: Break Detect */
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#define Z8_UARTSTAT0_TDRE _HX(04) /* Bit 2: Transmitter Data Register Empty */
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#define Z8_UARTSTAT0_TXE _HX(02) /* Bit 1: Transmitter Empty */
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#define Z8_UARTSTAT0_CTS _HX(01) /* Bit 0: Clear To Send */
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/* UART0/1 Control 0/1 Register Bit Definitions *************************************/
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#define Z8_UARTCTL0_TEN _HX(80) /* Bit 7: Transmit Enable */
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#define Z8_UARTCTL0_REN _HX(40) /* Bit 6: Receive Enable */
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#define Z8_UARTCTL0_CTSE _HX(20) /* Bit 5: CTS Enable */
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#define Z8_UARTCTL0_PEN _HX(10) /* Bit 4: Parity Enable */
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#define Z8_UARTCTL0_PSEL _HX(08) /* Bit 3: Odd Parity Select */
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#define Z8_UARTCTL0_SBRK _HX(04) /* Bit 2: Send Break */
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#define Z8_UARTCTL0_STOP _HX(02) /* Bit 1: Stop Bit Select */
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#define Z8_UARTCTL0_LBEN _HX(01) /* Bit 0: Loopback Enable */
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#define Z8_UARTCTL1_MPMD1 _HX(80) /* Bit 7: Multiprocessor Mode (bit1) */
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#define Z8_UARTCTL1_MPEN _HX(40) /* Bit 6: Multiprocessor Enable */
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#define Z8_UARTCTL1_MPMD0 _HX(20) /* Bit 5: Multiprocessor Mode (bit0) */
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#define Z8_UARTCTL1_MPBT _HX(10) /* Bit 4: Multiprocessor Bit Transmit */
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#define Z8_UARTCTL1_DEPOL _HX(08) /* Bit 3: Driver Enable Polarity */
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#define Z8_UARTCTL1_BRGCTL _HX(04) /* Bit 2: Baud Rate Generator Control */
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#define Z8_UARTCTL1_RDAIRQ _HX(02) /* Bit 1: Receive Data Interrupt Enable */
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#define Z8_UARTCTL1_IREN _HX(01) /* Bit 0: Infrared Encoder/Decoder Enable */
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/* UART0/1 Mode Status/Select Register Bit Definitions ******************************/
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#define Z8_UARTMDSEL_NORMAL _HX(00) /* Bits 5-7=0: Multiprocessor and Normal Mode */
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#define Z8_UARTMDSEL_FILTER HX(20) /* Bits 5-7=1: Noise Filter Control/Status */
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#define Z8_UARTMDSEL_LINP HX(40) /* Bits 5-7=2: LIN protocol Control/Status */
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#define Z8_UARTMDSEL_HWREV HX(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */
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/* Bits 0-4: Mode dependent status */
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/* I2C Status Register Bit Definitions **********************************************/
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#if defined(_Z8FMC16) || defined(_Z8F1680)
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# define I2C_ISTAT_NCKI (1 << 0) /* Bit 0: 1=NAK Interrupt */
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# define I2C_ISTAT_SPRS (1 << 1) /* Bit 1: 1=STOP/RESTART condition Interrupt */
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# define I2C_ISTAT_ARBLST (1 << 2) /* Bit 2: 1=Arbitration lost */
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# define I2C_ISTAT_RD (1 << 3) /* Bit 3: 1=Read */
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# define I2C_ISTAT_GCA (1 << 4) /* Bit 4: 1=General Call Address */
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# define I2C_ISTAT_SAM (1 << 5) /* Bit 5: 1=Slave address match */
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# define I2C_ISTAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
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# define I2C_ISTAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
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#else
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# define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NAK Interrupt */
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# define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */
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# define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */
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# define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */
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# define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */
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# define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */
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# define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
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# define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
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#endif
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/* I2C Control Register Bit Definitions *********************************************/
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#define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */
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#define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */
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#define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */
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#define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */
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#define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */
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#define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */
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#define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */
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#define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_Z80_SRC_Z8_CHIP_H */
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