b984752aec
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer * arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2 * arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly * arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling * arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure * arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method * arch: x86_64: Fix C alias of page table and GDT/IST * arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup * arch: x86_64: Consolidate MSR definition in arch/arch.h * arch: x86_64: Edit the way of handling GDT/IST in C into structures * arch: x86_64: Correct the starting point of isr/irq stack * arch: x86_64: Update up_initialize.c with the new initializing procedure * arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT * arch: x86_64: Overhual of interrupt initialization procedure * arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory] * arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure * arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug * arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot * arch: x86_64: Correctly apply license header, comment and format code * arch: x86_64: properly send a SIGFPE on floating point error * arch: x86_64: Remove unused variable in up_restore_auxstate * arch: x86_64: properly trash the processor with an infinite loop * arch: x86_64: Fix typo in ISR handler causing ISR not handled * arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path * arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE * arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method * board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support * arch: x86_64: update defconfigs * arch: x86_64: rename qemu as qemu-intel64 * arch: x86_64: update Board readme
157 lines
5.3 KiB
C
157 lines
5.3 KiB
C
/****************************************************************************
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* arch/x86_64/include/intel64/syscall.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through include/syscall.h or include/sys/sycall.h
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*/
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#ifndef __ARCH_X86_64_INCLUDE_INTEL64_SYSCALL_H
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#define __ARCH_X86_64_INCLUDE_INTEL64_SYSCALL_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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void enable_syscall(void);
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void syscall_entry(void);
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uint64_t syscall_handler(unsigned long nbr, uintptr_t parm1, uintptr_t parm2,
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uintptr_t parm3, uintptr_t parm4, uintptr_t parm5,
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uintptr_t parm6);
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uint64_t linux_interface(unsigned long nbr, uintptr_t parm1, uintptr_t parm2,
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uintptr_t parm3, uintptr_t parm4, uintptr_t parm5,
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uintptr_t parm6);
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/* SWI with SYS_ call number and six parameters */
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static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1,
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uintptr_t parm2, uintptr_t parm3,
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uintptr_t parm4, uintptr_t parm5,
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uintptr_t parm6);
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/* SWI with SYS_ call number and no parameters */
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static inline uintptr_t sys_call0(unsigned int nbr)
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{
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return sys_call6(nbr, 0, 0, 0, 0, 0, 0);
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}
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/* SWI with SYS_ call number and one parameter */
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static inline uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1)
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{
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return sys_call6(nbr, parm1, 0, 0, 0, 0, 0);
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}
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/* SWI with SYS_ call number and two parameters */
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static inline uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1,
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uintptr_t parm2)
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{
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return sys_call6(nbr, parm1, parm2, 0, 0, 0, 0);
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}
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/* SWI with SYS_ call number and three parameters */
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static inline uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1,
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uintptr_t parm2, uintptr_t parm3)
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{
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return sys_call6(nbr, parm1, parm2, parm3, 0, 0, 0);
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}
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/* SWI with SYS_ call number and four parameters */
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static inline uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1,
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uintptr_t parm2, uintptr_t parm3,
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uintptr_t parm4)
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{
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return sys_call6(nbr, parm1, parm2, parm3, parm4, 0, 0);
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}
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/* SWI with SYS_ call number and five parameters */
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static inline uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1,
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uintptr_t parm2, uintptr_t parm3,
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uintptr_t parm4, uintptr_t parm5)
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{
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return sys_call6(nbr, parm1, parm2, parm3, parm4, parm5, 0);
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}
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static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1,
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uintptr_t parm2, uintptr_t parm3,
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uintptr_t parm4, uintptr_t parm5,
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uintptr_t parm6)
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{
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register uint64_t reg0 __asm__("rax") = (uint64_t)(nbr);
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register uint64_t reg1 __asm__("rdi") = (uint64_t)(parm1);
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register uint64_t reg2 __asm__("rsi") = (uint64_t)(parm2);
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register uint64_t reg3 __asm__("rdx") = (uint64_t)(parm3);
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register uint64_t reg4 __asm__("r10") = (uint64_t)(parm4);
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register uint64_t reg5 __asm__("r8") = (uint64_t)(parm5);
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register uint64_t reg6 __asm__("r9") = (uint64_t)(parm6);
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__asm__ __volatile__
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(
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"syscall"
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: "=r"(reg0)
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: "r"(reg0), "r"(reg1), "r"(reg2),
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"r"(reg3), "r"(reg4), "r"(reg5), "r"(reg6)
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: "memory"
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);
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return reg0;
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}
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_X86_64_INCLUDE_INTEL64_SYSCALL_H */
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