a763ed1e07
This commit ensures that RTC data is properly allocated in the RTC segment in the linker. This fixes the reported problem about using the legacy bootloader and RTC.
291 lines
7.5 KiB
Plaintext
291 lines
7.5 KiB
Plaintext
/****************************************************************************
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* boards/risc-v/esp32h2/common/scripts/esp32h2_legacy_sections.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Default entry point: */
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ENTRY(__start);
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SECTIONS
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{
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.iram0.text :
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{
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_iram_start = ABSOLUTE(.);
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/* Vectors go to start of IRAM */
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KEEP(*(.exception_vectors.text));
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. = ALIGN(4);
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*(.iram1)
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*(.iram1.*)
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*libarch.a:brownout.*(.text .text.* .literal .literal.*)
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*libarch.a:cpu.*(.text .text.* .literal .literal.*)
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*libarch.a:gpio_hal.*(.text .text.* .literal .literal.*)
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*libarch.a:periph_ctrl.*(.text .text.* .literal .literal.*)
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*libarch.a:rtc_clk.*(.text .text.* .literal .literal.*)
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*libarch.a:rtc_sleep.*(.text .text.* .literal .literal.*)
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*libarch.a:rtc_time.*(.text .text.* .literal .literal.*)
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*libarch.a:systimer.*(.text .text.* .literal .literal.*)
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*libarch.a:systimer_hal.*(.text .text.* .literal .literal.*)
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*libarch.a:uart_hal_iram.*(.text .text.* .literal .literal.*)
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*libarch.a:wdt_hal_iram.*(.text .text.* .literal .literal.*)
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*libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*)
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} >iram0_0_seg
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/* Marks the end of IRAM code segment */
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.iram0.text_end (NOLOAD) :
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{
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. = ALIGN(16);
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} >iram0_0_seg
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.iram0.data :
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{
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. = ALIGN(16);
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*(.iram.data)
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*(.iram.data*)
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} >iram0_0_seg
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.iram0.bss (NOLOAD) :
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{
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. = ALIGN(16);
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*(.iram.bss)
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*(.iram.bss*)
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. = ALIGN(16);
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_iram_end = ABSOLUTE(.);
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} >iram0_0_seg
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/* This section is required to skip .iram0.text area because iram0_0_seg
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* and dram0_0_seg reflect the same address space on different buses.
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*/
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.dram0.dummy (NOLOAD):
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{
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. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
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} >dram0_0_seg
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.noinit (NOLOAD):
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{
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/* This section contains data that is not initialized during load,
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* or during the application's initialization sequence.
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*/
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. = ALIGN(4);
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*(.noinit)
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*(.noinit.*)
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. = ALIGN(4);
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} >dram0_0_seg
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.dram0.data :
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{
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_sdata = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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__global_pointer$ = . + 0x800;
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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*(.dram1)
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*(.dram1.*)
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*libarch.a:brownout.*(.rodata .rodata.*)
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*libarch.a:cpu.*(.rodata .rodata.*)
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*libarch.a:gpio_hal.*(.rodata .rodata.*)
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*libarch.a:interrupt.*(.rodata .rodata.*)
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*libarch.a:periph_ctrl.*(.rodata .rodata.*)
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*libarch.a:rtc_clk.*(.rodata .rodata.*)
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*libarch.a:rtc_sleep.*(.rodata .rodata.*)
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*libarch.a:rtc_time.*(.rodata .rodata.*)
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*libarch.a:systimer.*(.rodata .rodata.*)
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*libarch.a:systimer_hal.*(.rodata .rodata.*)
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*libarch.a:uart_hal_iram.*(.rodata .rodata.*)
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*libarch.a:wdt_hal_iram.*(.rodata .rodata.*)
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*libsched.a:irq_dispatch.*(.rodata .rodata.*)
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} >dram0_0_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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. = ALIGN(8);
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_sbss = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(32);
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_ebss = ABSOLUTE(.);
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} >dram0_0_seg
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.flash.text :
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{
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_stext = .;
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_etext = .;
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/* Similar to _iram_start, this symbol goes here so it is
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* resolved by addr2line in preference to the first symbol in
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* the flash.text segment.
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*/
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_flash_cache_start = ABSOLUTE(0);
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} >default_code_seg
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.flash_rodata_dummy (NOLOAD):
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{
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/* Start at the same alignment constraint than .flash.text */
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. = ALIGN(ALIGNOF(.flash.text));
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/* Create an empty gap as big as .flash.text section */
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. = . + SIZEOF(.flash.text);
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/* Prepare the alignment of the section above. Few bytes (0x20) must be
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* added for the mapping header.
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*/
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. = ALIGN(0x10000) + 0x20;
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} >default_rodata_seg
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.flash.rodata : ALIGN(0x10)
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{
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_srodata = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.srodata.*)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table .gcc_except_table.*)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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. = (. + 3) & ~ 3;
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__eh_frame = ABSOLUTE(.);
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KEEP(*(.eh_frame))
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. = (. + 7) & ~ 3;
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/* C++ constructor and destructor tables:
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* RISC-V GCC is configured with --enable-initfini-array so it emits an
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* .init_array section instead.
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*/
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_sinit = ABSOLUTE(.);
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
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_einit = ABSOLUTE(.);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_erodata = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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} >default_rodata_seg
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/* RTC fast memory holds RTC wake stub code !*/
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.rtc.text :
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{
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
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} >lp_ram_seg
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/* RTC data section holds RTC wake stub data/rodata. */
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.rtc.data :
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{
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*(.rtc.data)
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*(.rtc.data.*)
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*(.rtc.rodata)
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*(.rtc.rodata.*)
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} >lp_ram_seg
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/* This section holds RTC data that should have fixed addresses.
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* The data are not initialized at power-up and are retained during deep sleep.
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*/
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.rtc_reserved (NOLOAD):
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{
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. = ALIGN(4);
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_rtc_reserved_start = ABSOLUTE(.);
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/* New data can only be added here to ensure existing data are not moved.
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Because data have adhered to the end of the segment and code is relied on it.
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>> put new data here << */
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*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
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KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
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_rtc_reserved_end = ABSOLUTE(.);
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} > rtc_reserved_seg
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_rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
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ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
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"RTC reserved segment data does not fit.")
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}
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