037c9ea0a4
Summary The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_. This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them: up_arch.h up_internal.h up_vfork.h The only change to the files is from including up_arch.h to arm_arch.h (for example). The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm. Impact There should be not impact of this change (other that one step toward more consistent naming). Testing stm32f4discovery:netnsh
915 lines
26 KiB
C
915 lines
26 KiB
C
/****************************************************************************
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* arch/arm/src/lpc54xx/lpc54_lcd.c
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* This driver derives from the LPC1788 LCD driver. The LPC1788 LCD is
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* identical tot he LPC54628 LCD other than some minor clocking differences.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/video/fb.h>
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#include "arm_arch.h"
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#include "hardware/lpc54_syscon.h"
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#include "hardware/lpc54_pinmux.h"
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#include "lpc54_config.h"
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#include "lpc54_enableclk.h"
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#include "lpc54_gpio.h"
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#include "lpc54_reset.h"
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#include "lpc54_lcd.h"
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define LPC54_LCD_CLK_PER_LINE \
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(CONFIG_LPC54_LCD_HWIDTH + CONFIG_LPC54_LCD_HPULSE + \
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CONFIG_LPC54_LCD_HFRONTPORCH + CONFIG_LPC54_LCD_HBACKPORCH)
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#define LPC54_LCD_LINES_PER_FRAME \
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(CONFIG_LPC54_LCD_VHEIGHT + CONFIG_LPC54_LCD_VPULSE + \
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CONFIG_LPC54_LCD_VFRONTPORCH + CONFIG_LPC54_LCD_VBACKPORCH)
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#define LPC54_LCD_PIXEL_CLOCK \
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(LPC54_LCD_CLK_PER_LINE * LPC54_LCD_LINES_PER_FRAME * \
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CONFIG_LPC54_LCD_REFRESH_FREQ)
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/* Framebuffer characteristics in bytes */
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#define LPC54_STRIDE ((CONFIG_LPC54_LCD_HWIDTH * LPC54_BPP + 7) / 8)
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#define LPC54_FBSIZE (LPC54_STRIDE * CONFIG_LPC54_LCD_VHEIGHT)
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/* Delays */
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#define LPC54_LCD_PWRDIS_DELAY 10000
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#define LPC54_LCD_PWREN_DELAY 10000
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Get information about the video controller configuration and the
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* configuration of each color plane.
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*/
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static int lpc54_getvideoinfo(FAR struct fb_vtable_s *vtable,
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FAR struct fb_videoinfo_s *vinfo);
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static int lpc54_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
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FAR struct fb_planeinfo_s *pinfo);
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/* The following is provided only if the video hardware supports RGB color
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* mapping
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*/
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#ifdef CONFIG_FB_CMAP
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static int lpc54_getcmap(FAR struct fb_vtable_s *vtable,
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FAR struct fb_cmap_s *cmap);
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static int lpc54_putcmap(FAR struct fb_vtable_s *vtable,
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FAR const struct fb_cmap_s *cmap);
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#endif
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/* The following is provided only if the video hardware supports a hardware
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* cursor
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*/
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#ifdef CONFIG_FB_HWCURSOR
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static int lpc54_getcursor(FAR struct fb_vtable_s *vtable,
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FAR struct fb_cursorattrib_s *attrib);
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static int lpc54_setcursor(FAR struct fb_vtable_s *vtable,
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FAR struct fb_setcursor_s *settings);
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* This structure describes the video controller */
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static const struct fb_videoinfo_s g_videoinfo =
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{
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.fmt = LPC54_COLOR_FMT,
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.xres = CONFIG_LPC54_LCD_HWIDTH,
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.yres = CONFIG_LPC54_LCD_VHEIGHT,
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.nplanes = 1,
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};
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/* This structure describes the single color plane */
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static const struct fb_planeinfo_s g_planeinfo =
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{
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.fbmem = (FAR void *)CONFIG_LPC54_LCD_VRAMBASE,
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.fblen = LPC54_FBSIZE,
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.stride = LPC54_STRIDE,
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.display = 0,
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.bpp = LPC54_BPP,
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};
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/* Current cursor position */
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#ifdef CONFIG_FB_HWCURSOR
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static struct fb_cursorpos_s g_cpos;
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/* Current cursor size */
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#ifdef CONFIG_FB_HWCURSORSIZE
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static struct fb_cursorsize_s g_csize;
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#endif
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#endif
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/* The framebuffer object -- There is no private state information in this
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* framebuffer driver.
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*/
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struct fb_vtable_s g_fbobject =
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{
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.getvideoinfo = lpc54_getvideoinfo,
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.getplaneinfo = lpc54_getplaneinfo,
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#ifdef CONFIG_FB_CMAP
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.getcmap = lpc54_getcmap,
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.putcmap = lpc54_putcmap,
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#endif
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#ifdef CONFIG_FB_HWCURSOR
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.getcursor = lpc54_getcursor,
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.setcursor = lpc54_setcursor,
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#endif
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lpc54_getvideoinfo
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****************************************************************************/
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static int lpc54_getvideoinfo(FAR struct fb_vtable_s *vtable,
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FAR struct fb_videoinfo_s *vinfo)
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{
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lcdinfo("vtable=%p vinfo=%p\n", vtable, vinfo);
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if (vtable && vinfo)
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{
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memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
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return OK;
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}
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lcderr("ERROR: Returning EINVAL\n");
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return -EINVAL;
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}
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/****************************************************************************
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* Name: lpc54_getplaneinfo
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****************************************************************************/
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static int lpc54_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
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FAR struct fb_planeinfo_s *pinfo)
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{
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lcdinfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
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if (vtable && planeno == 0 && pinfo)
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{
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memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
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return OK;
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}
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lcderr("ERROR: Returning EINVAL\n");
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return -EINVAL;
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}
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/****************************************************************************
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* Name: lpc54_getcmap
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****************************************************************************/
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#ifdef CONFIG_FB_CMAP
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static int lpc54_getcmap(FAR struct fb_vtable_s *vtable,
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FAR struct fb_cmap_s *cmap)
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{
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uint32_t *pal;
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uint32_t rgb;
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int last;
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int i;
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lcdinfo("vtable=%p cmap=%p first=%d len=%d\n",
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vtable, cmap, cmap->first, cmap->len);
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DEBUGASSERT(vtable && cmap &&
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cmap->first < 256 && (cmap->first + cmap->len) < 256);
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pal = (uint32_t *)LPC54_LCD_PAL(cmap->first >> 1);
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last = cmap->first + cmap->len;
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/* Handle the case where the first color starts on an odd boundary */
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i = cmap->first;
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if ((i & 1) != 0)
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{
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rgb = *pal++;
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i++;
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/* Save the odd palette value */
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cmap->red[i] = (rgb & LCD_PAL_R1_MASK) >> LCD_PAL_R1_SHIFT;
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cmap->green[i] = (rgb & LCD_PAL_G1_MASK) >> LCD_PAL_G1_SHIFT;
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cmap->blue[i] = (rgb & LCD_PAL_B1_MASK) >> LCD_PAL_B1_SHIFT;
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#ifdef CONFIG_FB_TRANSPARENCY
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cmap->transp[i] = 0;
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#endif
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}
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/* Handle even colors */
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for (; i < last; i += 2)
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{
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rgb = *pal++;
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/* Save the even palette value */
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cmap->red[i] = (rgb & LCD_PAL_R0_MASK) >> LCD_PAL_R0_SHIFT;
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cmap->green[i] = (rgb & LCD_PAL_G0_MASK) >> LCD_PAL_G0_SHIFT;
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cmap->blue[i] = (rgb & LCD_PAL_B0_MASK) >> LCD_PAL_B0_SHIFT;
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#ifdef CONFIG_FB_TRANSPARENCY
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cmap->transp[i] = 0;
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#endif
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/* Handle the case where the len ends on an odd boundary */
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if ((i + 1) < last)
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{
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/* Save the even palette value */
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cmap->red[i+1] = (rgb & LCD_PAL_R1_MASK) >> LCD_PAL_R1_SHIFT;
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cmap->green[i+1] = (rgb & LCD_PAL_G1_MASK) >> LCD_PAL_G1_SHIFT;
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cmap->blue[i+1] = (rgb & LCD_PAL_B1_MASK) >> LCD_PAL_B1_SHIFT;
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#ifdef CONFIG_FB_TRANSPARENCY
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cmap->transp[i+1] = 0;
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#endif
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}
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}
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return OK;
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}
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#endif
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/****************************************************************************
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* Name: lpc54_putcmap
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****************************************************************************/
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#ifdef CONFIG_FB_CMAP
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static int lpc54_putcmap(FAR struct fb_vtable_s *vtable,
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FAR const struct fb_cmap_s *cmap)
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{
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uint32_t *pal;
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uint32_t rgb0;
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uint32_t rgb1;
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int last;
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int i;
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lcdinfo("vtable=%p cmap=%p first=%d len=%d\n",
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vtable, cmap, cmap->first, cmap->len);
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DEBUGASSERT(vtable && cmap);
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pal = (uint32_t *)LPC54_LCD_PAL(cmap->first >> 1);
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last = cmap->first + cmap->len;
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/* Handle the case where the first color starts on an odd boundary */
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i = cmap->first;
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if ((i & 1) != 0)
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{
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rgb0 = *pal;
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rgb0 &= (LCD_PAL_R0_MASK | LCD_PAL_G0_MASK | LCD_PAL_B0_MASK | LCD_PAL_I0);
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rgb1 |= ((uint32_t)cmap->red[i] << LCD_PAL_R0_SHIFT |
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(uint32_t)cmap->green[i] << LCD_PAL_G0_SHIFT |
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(uint32_t)cmap->blue[i] << LCD_PAL_B0_SHIFT);
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/* Save the new palette value */
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*pal++ = (rgb0 | rgb1);
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i++;
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}
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/* Handle even colors */
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for (; i < last; i += 2)
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{
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uint32_t rgb0 = ((uint32_t)cmap->red[i] << LCD_PAL_R0_SHIFT |
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(uint32_t)cmap->green[i] << LCD_PAL_G0_SHIFT |
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(uint32_t)cmap->blue[i] << LCD_PAL_B0_SHIFT);
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/* Handle the case where the len ends on an odd boundary */
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if ((i + 1) >= last)
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{
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rgb1 = *pal;
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rgb1 &= (LCD_PAL_R1_MASK | LCD_PAL_G1_MASK | LCD_PAL_B1_MASK | LCD_PAL_I1);
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}
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else
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{
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rgb1 = ((uint32_t)cmap->red[i+1] << LCD_PAL_R1_SHIFT |
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(uint32_t)cmap->green[i+1] << LCD_PAL_G1_SHIFT |
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(uint32_t)cmap->blue[i+1] << LCD_PAL_B1_SHIFT);
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}
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/* Save the new palette value */
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*pal++ = (rgb0 | rgb1);
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}
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return OK;
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}
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#endif
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/****************************************************************************
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* Name: lpc54_getcursor
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****************************************************************************/
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#ifdef CONFIG_FB_HWCURSOR
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static int lpc54_getcursor(FAR struct fb_vtable_s *vtable,
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FAR struct fb_cursorattrib_s *attrib)
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{
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lcdinfo("vtable=%p attrib=%p\n", vtable, attrib);
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if (vtable && attrib)
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{
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#ifdef CONFIG_FB_HWCURSORIMAGE
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attrib->fmt = LPC54_COLOR_FMT;
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#endif
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lcdinfo("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
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attrib->pos = g_cpos;
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#ifdef CONFIG_FB_HWCURSORSIZE
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attrib->mxsize.h = CONFIG_LPC54_LCD_VHEIGHT;
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attrib->mxsize.w = CONFIG_LPC54_LCD_HWIDTH;
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lcdinfo("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
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attrib->size = g_csize;
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#endif
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return OK;
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}
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lcderr("ERROR: Returning EINVAL\n");
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return -EINVAL;
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}
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#endif
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/****************************************************************************
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* Name: lpc54_setcursor
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****************************************************************************/
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#ifdef CONFIG_FB_HWCURSOR
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static int lpc54_setcursor(FAR struct fb_vtable_s *vtable,
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FAR struct fb_setcursor_s *settings)
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{
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lcdinfo("vtable=%p settings=%p\n", vtable, settings);
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if (vtable && settings)
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{
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lcdinfo("flags: %02x\n", settings->flags);
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if ((flags & FB_CUR_SETPOSITION) != 0)
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{
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g_cpos = settings->pos;
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lcdinfo("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
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}
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#ifdef CONFIG_FB_HWCURSORSIZE
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if ((flags & FB_CUR_SETSIZE) != 0)
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{
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g_csize = settings->size;
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lcdinfo("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
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}
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#endif
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#ifdef CONFIG_FB_HWCURSORIMAGE
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if ((flags & FB_CUR_SETIMAGE) != 0)
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{
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lcdinfo("image: (h:%d, w:%d) @ %p\n",
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settings->img.height, settings->img.width,
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settings->img.image);
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}
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#endif
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return OK;
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}
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lcderr("ERROR: Returning EINVAL\n");
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return -EINVAL;
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_fbinitialize
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*
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* Description:
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* Initialize the framebuffer video hardware associated with the display.
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*
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* Input Parameters:
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* display - In the case of hardware with multiple displays, this
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* specifies the display. Normally this is zero.
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*
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* Returned Value:
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* Zero is returned on success; a negated errno value is returned on any
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* failure.
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*
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****************************************************************************/
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int up_fbinitialize(int display)
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{
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uint32_t regval;
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uint32_t bcd;
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uint32_t pcd;
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int i;
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/* Configure pins */
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/* LCD panel data. Pins used depend on the panel configuration:
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*
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* STN 4BPP: VD0-VD3 (single panel)
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* VD0-VD3, VD8-VD11 (dual panel)
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* STN 8BPP: VD0-VD7 (single panel)
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* VD0-VD15 (dual panel)
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* TFT 12BPP: VD4-VD7, VD12-VD15, VD20-VD23
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* TFT 16BPP: VD3-VD7, VD10-VD15, VD19-VD23
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* TFT 24BPP: VD0-VD23
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*/
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lcdinfo("Configuring pins\n");
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#if !defined(CONFIG_LPC54_LCD_BPP16_565) && !defined(CONFIG_LPC54_LCD_BPP12_444)
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lpc54_gpio_config(GPIO_LCD_VD0);
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lpc54_gpio_config(GPIO_LCD_VD1);
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lpc54_gpio_config(GPIO_LCD_VD2);
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#endif
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#ifndef CONFIG_LPC54_LCD_BPP12_444
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lpc54_gpio_config(GPIO_LCD_VD3);
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#endif
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lpc54_gpio_config(GPIO_LCD_VD4);
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lpc54_gpio_config(GPIO_LCD_VD5);
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lpc54_gpio_config(GPIO_LCD_VD6);
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lpc54_gpio_config(GPIO_LCD_VD7);
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#if LPC54_BPP > 8 /* Or STN 8-BPP Dual panel */
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#if !defined(CONFIG_LPC54_LCD_BPP16_565) && !defined(CONFIG_LPC54_LCD_BPP12_444)
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lpc54_gpio_config(GPIO_LCD_VD8);
|
|
lpc54_gpio_config(GPIO_LCD_VD9);
|
|
#endif
|
|
#ifndef CONFIG_LPC54_LCD_BPP12_444
|
|
lpc54_gpio_config(GPIO_LCD_VD10);
|
|
lpc54_gpio_config(GPIO_LCD_VD11);
|
|
#endif
|
|
lpc54_gpio_config(GPIO_LCD_VD12);
|
|
lpc54_gpio_config(GPIO_LCD_VD13);
|
|
lpc54_gpio_config(GPIO_LCD_VD14);
|
|
lpc54_gpio_config(GPIO_LCD_VD15);
|
|
#endif
|
|
|
|
#if LPC54_BPP > 16 || defined(CONFIG_LPC54_LCD_TFTPANEL)
|
|
#if !defined(CONFIG_LPC54_LCD_BPP16_565) && !defined(CONFIG_LPC54_LCD_BPP12_444)
|
|
lpc54_gpio_config(GPIO_LCD_VD16);
|
|
lpc54_gpio_config(GPIO_LCD_VD17);
|
|
lpc54_gpio_config(GPIO_LCD_VD18);
|
|
#endif
|
|
#ifndef CONFIG_LPC54_LCD_BPP12_444
|
|
lpc54_gpio_config(GPIO_LCD_VD19);
|
|
#endif
|
|
lpc54_gpio_config(GPIO_LCD_VD20);
|
|
lpc54_gpio_config(GPIO_LCD_VD21);
|
|
lpc54_gpio_config(GPIO_LCD_VD22);
|
|
lpc54_gpio_config(GPIO_LCD_VD23);
|
|
#endif
|
|
|
|
/* Other pins */
|
|
|
|
lpc54_gpio_config(GPIO_LCD_AC); /* STN AC bias drive or TFT data enable output */
|
|
lpc54_gpio_config(GPIO_LCD_DCLK); /* LCD panel clock */
|
|
lpc54_gpio_config(GPIO_LCD_FP); /* Frame pulse (STN).
|
|
* Vertical synchronization pulse (TFT) */
|
|
lpc54_gpio_config(GPIO_LCD_LE); /* Line end signal */
|
|
lpc54_gpio_config(GPIO_LCD_LP); /* Line synchronization pulse (STN).
|
|
* Horizontal synchronization pulse (TFT) */
|
|
lpc54_gpio_config(GPIO_LCD_PWR); /* LCD panel power enable */
|
|
|
|
#ifdef CONFIG_LPC54_LCD_USE_CLKIN
|
|
lpc54_gpio_config(GPIO_LCD_CLKIN); /* Optional clock input */
|
|
#endif
|
|
|
|
lcdinfo("Enable clocking to the LCD controller\n");
|
|
|
|
/* Enable clocking to the LCD peripheral */
|
|
|
|
lpc54_lcd_enableclk();
|
|
|
|
/* Route Main clock (or LCK CLKIN) to the LCD. */
|
|
|
|
#ifdef CONFIG_LPC54_LCD_USE_CLKIN
|
|
putreg32(SYSCON_LCDCLKSEL_LCDCLKIN, LPC54_SYSCON_LCDCLKSEL);
|
|
#else
|
|
putreg32(SYSCON_LCDCLKSEL_MAINCLK, LPC54_SYSCON_LCDCLKSEL);
|
|
#endif
|
|
|
|
/* Set the LCD clock divider to one. */
|
|
|
|
putreg32(SYSCON_LCDCLKDIV_DIV(1), LPC54_SYSCON_LCDCLKDIV);
|
|
putreg32(SYSCON_LCDCLKDIV_DIV(1) | SYSCON_LCDCLKDIV_REQFLAG,
|
|
LPC54_SYSCON_LCDCLKDIV);
|
|
|
|
/* Reset the LCD */
|
|
|
|
lpc54_reset_lcd();
|
|
|
|
lcdinfo("Configuring the LCD controller\n");
|
|
|
|
/* Disable the cursor */
|
|
|
|
regval = getreg32(LPC54_LCD_CRSR_CRTL);
|
|
regval &= ~LCD_CRSR_CTRL_CRSON;
|
|
putreg32(regval, LPC54_LCD_CRSR_CRTL);
|
|
|
|
/* Clear any pending interrupts */
|
|
|
|
putreg32(LCD_INTCLR_ALL, LPC54_LCD_INTCLR);
|
|
|
|
/* Disable the LCD controller */
|
|
|
|
putreg32(0, LPC54_LCD_CTRL);
|
|
|
|
/* Set the bits per pixel */
|
|
|
|
regval = getreg32(LPC54_LCD_CTRL);
|
|
regval &= ~LCD_CTRL_LCDBPP_MASK;
|
|
|
|
#if defined(CONFIG_LPC54_LCD_BPP1)
|
|
regval |= LCD_CTRL_LCDBPP_1; /* 1 bpp */
|
|
#elif defined(CONFIG_LPC54_LCD_BPP2)
|
|
regval |= LCD_CTRL_LCDBPP_2; /* 2 bpp */
|
|
#elif defined(CONFIG_LPC54_LCD_BPP4)
|
|
regval |= LCD_CTRL_LCDBPP_4; /* 4 bpp */
|
|
#elif defined(CONFIG_LPC54_LCD_BPP8)
|
|
regval |= LCD_CTRL_LCDBPP_8; /* 8 bpp */
|
|
#elif defined(CONFIG_LPC54_LCD_BPP16)
|
|
regval |= LCD_CTRL_LCDBPP_16; /* 16 bpp */
|
|
#elif defined(CONFIG_LPC54_LCD_BPP24)
|
|
regval |= LCD_CTRL_LCDBPP_24; /* 24-bit TFT panel only */
|
|
#elif defined(CONFIG_LPC54_LCD_BPP16_565)
|
|
regval |= LCD_CTRL_LCDBPP_565; /* 16 bpp, 5:6:5 mode */
|
|
#else /* defined(CONFIG_LPC54_LCD_BPP12_444) */
|
|
regval |= LCD_CTRL_LCDBPP_444; /* 12 bpp, 4:4:4 mode */
|
|
#endif
|
|
|
|
#ifdef CONFIG_LPC54_LCD_TFTPANEL
|
|
/* TFT panel */
|
|
|
|
regval |= LCD_CTRL_LCDTFT;
|
|
#else
|
|
/* STN panel */
|
|
|
|
regval &= ~LCD_CTRL_LCDTFT;
|
|
#endif
|
|
|
|
#ifdef CONFIG_LPC54_LCD_BGR
|
|
/* Swap red and blue. The colors will be 0x00RRGGBB, not 0x00BBGGRR. */
|
|
|
|
regval |= LCD_CTRL_BGR;
|
|
#else
|
|
regval &= ~LCD_CTRL_BGR;
|
|
#endif
|
|
|
|
/* Single panel */
|
|
|
|
regval &= ~LCD_CTRL_LCDDUAL;
|
|
|
|
/* Select monochrome or color LCD */
|
|
|
|
#ifdef CONFIG_LPC54_LCD_MONOCHROME
|
|
/* Select monochrome LCD */
|
|
|
|
regval &= ~LCD_CTRL_BGR;
|
|
|
|
/* Select 4- or 8-bit monochrome interface */
|
|
|
|
#if LPC54_BPP > 4
|
|
regval |= LCD_CTRL_LCDMONO8;
|
|
#else
|
|
regval &= ~LCD_CTRL_LCDMONO8;
|
|
#endif
|
|
|
|
#else
|
|
/* Select color LCD */
|
|
|
|
regval &= ~(LCD_CTRL_LCDBW | LCD_CTRL_LCDMONO8);
|
|
|
|
#endif /* CONFIG_LPC54_LCD_MONOCHROME */
|
|
|
|
/* Little endian byte order */
|
|
|
|
regval &= ~LCD_CTRL_BEBO;
|
|
|
|
/* Little endian pixel order */
|
|
|
|
regval &= ~LCD_CTRL_BEPO;
|
|
putreg32(regval, LPC54_LCD_CTRL);
|
|
|
|
/* Initialize horizontal timing */
|
|
|
|
putreg32(0, LPC54_LCD_TIMH);
|
|
|
|
regval = (((CONFIG_LPC54_LCD_HWIDTH/16) - 1) << LCD_TIMH_PPL_SHIFT |
|
|
(CONFIG_LPC54_LCD_HPULSE - 1) << LCD_TIMH_HSW_SHIFT |
|
|
(CONFIG_LPC54_LCD_HFRONTPORCH - 1) << LCD_TIMH_HFP_SHIFT |
|
|
(CONFIG_LPC54_LCD_HBACKPORCH - 1) << LCD_TIMH_HBP_SHIFT);
|
|
putreg32(regval, LPC54_LCD_TIMH);
|
|
|
|
/* Initialize vertical timing */
|
|
|
|
putreg32(0, LPC54_LCD_TIMV);
|
|
|
|
regval = ((CONFIG_LPC54_LCD_VHEIGHT - 1) << LCD_TIMV_LPP_SHIFT |
|
|
(CONFIG_LPC54_LCD_VPULSE - 1) << LCD_TIMV_VSW_SHIFT |
|
|
(CONFIG_LPC54_LCD_VFRONTPORCH) << LCD_TIMV_VFP_SHIFT |
|
|
(CONFIG_LPC54_LCD_VBACKPORCH) << LCD_TIMV_VBP_SHIFT);
|
|
putreg32(regval, LPC54_LCD_TIMV);
|
|
|
|
/* Get the pixel clock divider */
|
|
|
|
#ifdef CONFIG_LPC54_LCD_USE_CLKIN
|
|
pcd = ((uint32_t)CONFIG_LPC54_LCD_CLKIN_FREQUENCY /
|
|
(uint32_t)LPC54_LCD_PIXEL_CLOCK) + 1;
|
|
#else
|
|
pcd = ((uint32_t)BOARD_MAIN_CLK / (uint32_t)LPC54_LCD_PIXEL_CLOCK);
|
|
#endif
|
|
|
|
/* Check the range of pcd */
|
|
|
|
bcd = 0;
|
|
|
|
#ifndef CONFIG_LPC54_LCD_TFTPANEL
|
|
DEBUGASSERT(pcd >= 2);
|
|
#else
|
|
if (pcd <= 1)
|
|
{
|
|
/* Just bypass the LCD divider */
|
|
|
|
pcd = 0;
|
|
bcd = LCD_POL_BCD;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
/* The register value is PCD - 2 */
|
|
|
|
pcd -= 2;
|
|
}
|
|
|
|
/* Initialize clock and signal polarity.
|
|
*
|
|
* REVISIT: These need to be configurable.
|
|
*/
|
|
|
|
regval = getreg32(LPC54_LCD_POL);
|
|
|
|
/* LCDFP pin is active LOW and inactive HIGH */
|
|
|
|
regval |= LCD_POL_IVS;
|
|
|
|
/* LCDLP pin is active LOW and inactive HIGH */
|
|
|
|
regval |= LCD_POL_IHS;
|
|
|
|
/* Data is driven out into the LCD on the falling edge */
|
|
|
|
regval &= ~LCD_POL_IPC;
|
|
|
|
/* Set number of clocks per line */
|
|
|
|
regval &= ~LCD_POL_CPL_MASK;
|
|
|
|
#if defined(CONFIG_LPC54_LCD_TFTPANEL)
|
|
/* TFT panel */
|
|
|
|
regval |= LCD_POL_CPL(CONFIG_LPC54_LCD_HWIDTH - 1);
|
|
#else
|
|
/* STN panel */
|
|
|
|
#if defined(CONFIG_LPC54_LCD_BPP8)
|
|
/* 8-bit monochrome STN panel */
|
|
|
|
regval |= LCD_POL_CPL((CONFIG_LPC54_LCD_HWIDTH / 8) - 1);
|
|
#elif defined(CONFIG_LPC54_LCD_BPP4)
|
|
/* 4-bit monochrome STN panel */
|
|
|
|
regval |= LCD_POL_CPL((CONFIG_LPC54_LCD_HWIDTH / 4) - 1);
|
|
#else
|
|
/* Color STN panel. */
|
|
|
|
regval |= LCD_POL_CPL(((CONFIG_LPC54_LCD_HWIDTH * 3) / 8) - 1);
|
|
#endif
|
|
#endif /* CONFIG_LPC54_LCD_TFTPANEL */
|
|
|
|
/* Set pixel clock divisor (or bypass) */
|
|
|
|
regval &= ~(LCD_POL_PCDLO_MASK | LCD_POL_PCDHI_MASK | LCD_POL_BCD);
|
|
regval |= LCD_POL_PCDLO(pcd) & LCD_POL_PCDLO_MASK;
|
|
regval |= LCD_POL_PCDHI(pcd >> 5) & LCD_POL_PCDHI_MASK;
|
|
regval |= bcd;
|
|
|
|
/* LCD_ENAB_M is active high */
|
|
|
|
regval &= ~LCD_POL_IOE;
|
|
putreg32(regval, LPC54_LCD_POL);
|
|
|
|
/* Frame base address doubleword aligned */
|
|
|
|
putreg32(CONFIG_LPC54_LCD_VRAMBASE & ~7, LPC54_LCD_UPBASE);
|
|
putreg32(CONFIG_LPC54_LCD_VRAMBASE & ~7, LPC54_LCD_LPBASE);
|
|
|
|
/* Clear the display */
|
|
|
|
lpc54_lcdclear(CONFIG_LPC54_LCD_BACKCOLOR);
|
|
|
|
#ifdef CONFIG_LPC54_LCD_BACKLIGHT
|
|
/* Turn on the back light */
|
|
|
|
lpc54_backlight(true);
|
|
#endif
|
|
|
|
putreg32(0, LPC54_LCD_INTMSK);
|
|
lcdinfo("Enabling the display\n");
|
|
|
|
for (i = LPC54_LCD_PWREN_DELAY; i; i--)
|
|
{
|
|
}
|
|
|
|
/* Enable LCD */
|
|
|
|
regval = getreg32(LPC54_LCD_CTRL);
|
|
regval |= LCD_CTRL_LCDEN;
|
|
putreg32(regval, LPC54_LCD_CTRL);
|
|
|
|
/* Enable LCD power */
|
|
|
|
for (i = LPC54_LCD_PWREN_DELAY; i; i--)
|
|
{
|
|
}
|
|
|
|
regval = getreg32(LPC54_LCD_CTRL);
|
|
regval |= LCD_CTRL_LCDPWR;
|
|
putreg32(regval, LPC54_LCD_CTRL);
|
|
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_fbgetvplane
|
|
*
|
|
* Description:
|
|
* Return a a reference to the framebuffer object for the specified video
|
|
* plane of the specified plane. Many OSDs support multiple planes of video.
|
|
*
|
|
* Input Parameters:
|
|
* display - In the case of hardware with multiple displays, this
|
|
* specifies the display. Normally this is zero.
|
|
* vplane - Identifies the plane being queried.
|
|
*
|
|
* Returned Value:
|
|
* A non-NULL pointer to the frame buffer access structure is returned on
|
|
* success; NULL is returned on any failure.
|
|
*
|
|
****************************************************************************/
|
|
|
|
FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
|
|
{
|
|
lcdinfo("vplane: %d\n", vplane);
|
|
if (vplane == 0)
|
|
{
|
|
return &g_fbobject;
|
|
}
|
|
else
|
|
{
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_fbuninitialize
|
|
*
|
|
* Description:
|
|
* Uninitialize the framebuffer support for the specified display.
|
|
*
|
|
* Input Parameters:
|
|
* display - In the case of hardware with multiple displays, this
|
|
* specifies the display. Normally this is zero.
|
|
*
|
|
* Returned Value:
|
|
* None
|
|
*
|
|
****************************************************************************/
|
|
|
|
void up_fbuninitialize(int display)
|
|
{
|
|
uint32_t regval;
|
|
int i;
|
|
|
|
/* We assume there is only one use of the LCD and so we do not need to
|
|
* worry about mutually exclusive access to the LCD hardware.
|
|
*/
|
|
|
|
#ifdef CONFIG_LPC54_LCD_BACKLIGHT
|
|
/* Turn off the back light */
|
|
|
|
lpc54_backlight(false);
|
|
#endif
|
|
|
|
/* Disable the LCD controller */
|
|
|
|
regval = getreg32(LPC54_LCD_CTRL);
|
|
regval &= ~LCD_CTRL_LCDPWR;
|
|
putreg32(regval, LPC54_LCD_CTRL);
|
|
|
|
for (i = LPC54_LCD_PWRDIS_DELAY; i; i--)
|
|
{
|
|
}
|
|
|
|
regval &= ~LCD_CTRL_LCDEN;
|
|
putreg32(regval, LPC54_LCD_CTRL);
|
|
|
|
/* Turn off clocking to the LCD. modifyreg32() can do this atomically. */
|
|
|
|
putreg32(SYSCON_LCDCLKSEL_NONE, LPC54_SYSCON_LCDCLKSEL);
|
|
|
|
/* Disable clocking to the LCD peripheral */
|
|
|
|
lpc54_lcd_disableclk();
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: lpc54_lcdclear
|
|
*
|
|
* Description:
|
|
* This is a non-standard LCD interface just for the LPC54xx. Clearing
|
|
* the display in the normal way by writing a sequences of runs that
|
|
* covers the entire display can be slow. Here the display is cleared by
|
|
* simply setting all VRAM memory to the specified color.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void lpc54_lcdclear(nxgl_mxpixel_t color)
|
|
{
|
|
int i;
|
|
#if LPC54_BPP > 16
|
|
uint32_t *dest = (uint32_t *)CONFIG_LPC54_LCD_VRAMBASE;
|
|
|
|
lcdinfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
|
|
color, CONFIG_LPC54_LCD_VRAMBASE,
|
|
CONFIG_LPC54_LCD_HWIDTH * CONFIG_LPC54_LCD_VHEIGHT * sizeof(uint32_t));
|
|
|
|
#else
|
|
uint16_t *dest = (uint16_t *)CONFIG_LPC54_LCD_VRAMBASE;
|
|
|
|
lcdinfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
|
|
color, CONFIG_LPC54_LCD_VRAMBASE,
|
|
CONFIG_LPC54_LCD_HWIDTH * CONFIG_LPC54_LCD_VHEIGHT * sizeof(uint16_t));
|
|
#endif
|
|
|
|
for (i = 0; i < (CONFIG_LPC54_LCD_HWIDTH * CONFIG_LPC54_LCD_VHEIGHT); i++)
|
|
{
|
|
*dest++ = color;
|
|
}
|
|
}
|