a9d713bbcc
Squashed commit of the following: arch/arm/src/samd5e5: Clean-up EIC logic. arch/arm/src/samd5e5: Fix some compilation issues; Still issues with the EIC logic from samd2x. arch/arm/src/samd5e5: Fix some compilation issues; bring in some EIC logic from samd2x. arch/arm/src/samd5e5: Add NVMCTRL header file, fix some compiler problems, misc. clean-up. configs/metro-m4: Add LED support. arch/arm/src/samd5e5: Bring in SAML21 clock configuration. This is a WIP; it cannot possible even compile yet. arch/arm/src/samd5e5: Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4. arch/arm/src/samd5e5: Add SERCOM utility function. arch/arm/src/samd5e5: Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5. This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs. arch/arm/src/samd5e5: Add sam_config.h header file arch/arm/src/samd5e5/: Add Generic Clock (GCLK) utility functions. arch/arm/src/samd5e5: Add EVSYS register definition file arch/arm/src/samd5e5 and configs/metro-m4: Use SERCOM3 for the Arduino serial shield as console. arch/arm/src/samd5e5/chip: Add SERCOM USART, SPI, I2C master, and slave register defintions header files arch/arm/src/samd5e5/chip: Add AES, PM, TRNG, and WDT header files. arch/arm/src/samd5e5/chip: Add pin multiplexing header files. Various fixes to configuration system; fix metro-m4/nsh defconfig file. configs/metro-m4: Add initial support for the Adafruit Metro M4 board. arch/arm/src/samd5e5: Add peripheral clock helpers. arch/arm/src/samd5e5/chip: Add PAC register definition header file. Fix some errors in the memory map header file. arch/arm/src/samd5e5: Add chip.h headerf file. arch/arm/src/samd5e5: Add PORT register definitions and support from SAML21. arch/arm/include/samd5e5: Add interrupt vector definitions. arch/arm/src/samd5e5: Add some boilerplate files. Correct some typos. arch/arm/src/samd5e5/chip/sam_eic.h: Add EIC register definitions. arch/arm/src/samd5e5/chip: Add OSC32KCTRL and OSCCTRL register definitions. arch/arm/src/samd5e5/chip: Add GCLK, MCLK, and RSTC header files. arch/arm/src/samd5e5/chip/sam_cmcc.h: Add CMCC register definitions arch/arm/src/samd5e5/chip/sam_supc.h: Add SUPC header file. arch/arm/src/samd5e5: Add start-up logic. arch/arm/src/samd5e5: Add Make.defs file arch/arm/src/samd5e5/chip: Add memory map header file. arch/arm/include/samd5e5: Add chip.h header file. arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig: Add configuration logic for the SAMD5x/Ex family.
155 lines
5.3 KiB
C
155 lines
5.3 KiB
C
/****************************************************************************
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* arch/arm/src/samd5e5/sam_timerisr.c
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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#include "nvic.h"
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#include "clock/clock.h"
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#include "up_internal.h"
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#include "up_arch.h"
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* The SysTick is driven by the CPU clock. */
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#define SAM_SYSTICK_CLOCK BOARD_CPU_FREQUENCY /* CPU frequency */
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/* The desired timer interrupt frequency is provided by the definition
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* CLK_TCK (see include/time.h). CLK_TCK defines the desired number of
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* system clock ticks per second. That value is a user configurable setting
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* that defaults to 100 (100 ticks per second = 10 MS interval).
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*/
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#define SYSTICK_RELOAD ((SAM_SYSTICK_CLOCK / CLK_TCK) - 1)
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/* The size of the reload field is 24 bits. Verify that the reload value
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* will fit in the reload register.
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*/
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#if SYSTICK_RELOAD > 0x00ffffff
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# error SYSTICK_RELOAD exceeds the range of the RELOAD register
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Function: sam_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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****************************************************************************/
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static int sam_timerisr(int irq, uint32_t *regs, void *arg)
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{
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/* Process timer interrupt */
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sched_process_timer();
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Function: arm_timer_initialize
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*
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* Description:
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* This function is called during start-up to initialize the timer
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* interrupt.
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*
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****************************************************************************/
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void arm_timer_initialize(void)
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{
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uint32_t regval;
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/* Set the SysTick interrupt to the default priority */
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regval = getreg32(NVIC_SYSH12_15_PRIORITY);
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regval &= ~NVIC_SYSH_PRIORITY_PR15_MASK;
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regval |= (NVIC_SYSH_PRIORITY_DEFAULT << NVIC_SYSH_PRIORITY_PR15_SHIFT);
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putreg32(regval, NVIC_SYSH12_15_PRIORITY);
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/* Make sure that the SysTick clock source is set correctly */
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#if 0 /* Does not work. Comes up with HCLK source and I can't change it */
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regval = getreg32(NVIC_SYSTICK_CTRL);
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#ifdef CONFIG_SAM34_SYSTICK_HCLKd8
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regval &= ~NVIC_SYSTICK_CTRL_CLKSOURCE;
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#else
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regval |= NVIC_SYSTICK_CTRL_CLKSOURCE;
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#endif
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putreg32(regval, NVIC_SYSTICK_CTRL);
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#endif
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/* Configure SysTick to interrupt at the requested rate */
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putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD);
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putreg32(0, NVIC_SYSTICK_CURRENT);
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/* Attach the timer interrupt vector */
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(void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)sam_timerisr, NULL);
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/* Enable SysTick interrupts */
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putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT |
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NVIC_SYSTICK_CTRL_ENABLE), NVIC_SYSTICK_CTRL);
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/* And enable the timer interrupt */
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up_enable_irq(SAM_IRQ_SYSTICK);
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}
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