494 lines
20 KiB
Plaintext
494 lines
20 KiB
Plaintext
README
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^^^^^^
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README for NuttX port to the Stellaris LM4F120 LaunchPad. The Stellaris® LM4F120 LaunchPad Evaluation Board is a low-cost evaluation platform for ARM® Cortex™-M4F-based microcontrollers from Texas Instruments.
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Contents
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^^^^^^^^
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Stellaris LM4F120 LaunchPad
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On-Board GPIO Usage
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Using OpenOCD and GDB with an FT2232 JTAG emulator
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LEDs
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Serial Console
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USB Device Controller Functions
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LM4F120 LaunchPad Configuration Options
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Configurations
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Stellaris LM4F120 LaunchPad
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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The Stellaris® LM4F120 LaunchPad Evaluation Kit offers these features:
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o A Stellaris® LaunchPad Evaluation board (EK-LM4F120XL)
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o On-board Stellaris® In-Circuit Debug Interface (ICDI)
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o Programmable user buttons and an RGB LED for custom applications.
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o USB Micro-B plug to USB-A plug cable
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Features of the LM4F120H5QR Microcontroller
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o 32-bit ARM® Cortex™-M4F 80-MHz processor core.
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o On-chip memory, featuring 256 KB single-cycle Flash up to 40 MHz (a
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prefetch buffer improves performance above 40 MHz), 32 KB single-cycle
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SRAM; internal ROM loaded with StellarisWare® software; 2KB EEPROM
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o Two Controller Area Network (CAN) modules, using CAN protocol version
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2.0 part A/B and with bit rates up to 1 Mbps
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o Universal Serial Bus (USB) controller with USB 2.0 full-speed (12 Mbps)
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and low-speed (1.5 Mbps) operation, 32 endpoints, and USB OTG/Host/Device
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mode
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o Advanced serial integration, featuring: eight UARTs with IrDA, 9-bit, and
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ISO 7816 support (one UART with modem status and modem flow control); four
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Synchronous Serial Interface (SSI) modules, supporting operation for
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Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial
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interfaces; four Inter-Integrated Circuit (I2C) modules, providing
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Standard (100 Kbps) and Fast (400 Kbps) transmission and support for
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sending and receiving data as either a master or a slave
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o ARM PrimeCell® 32-channel configurable µDMA controller, providing a way to
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offload data transfer tasks from the Cortex™-M4F processor, allowing for
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more efficient use of the processor and the available bus bandwidth
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o Analog support, featuring: two 12-bit Analog-to-Digital Converters (ADC)
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with 12 analog input channels and a sample rate of one million
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samples/second; two analog comparators; 16 digital comparators; on-chip
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voltage regulator
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o Advanced motion control, featuring: eight Pulse Width Modulation (PWM)
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generator blocks, each with one 16-bit counter, two PWM comparators, a
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PWM signal generator, a dead-band generator, and an interrupt/ADC-trigger
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selector; two PWM fault inputs to promote low-latency shutdown; two
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Quadrature Encoder Interface (QEI) modules, with position integrator to
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rack encoder position and velocity capture using built-in timer
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o Two ARM FiRM-compliant watchdog timers; six 32-bit general-purpose timers
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(up to twelve 16-bit); six wide 64-bit general-purpose timers (up to twelve
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32-bit); 12 16/32-bit and 12 32/64-bit Capture Compare PWM (CCP) pins
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o Up to 43 GPIOs (depending on configuration), with programmable control for
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GPIO interrupts and pad configuration, and highly flexible pin muxing
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o Lower-power battery-backed Hibernation module with Real-Time Clock
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o Multiple clock sources for microcontroller system clock: Precision
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Oscillator (PIOSC), Main Oscillator (MOSC), 32.768-kHz external oscillator
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for the Hibernation Module, and Internal 30-kHz Oscillator
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o Full-featured debug solution with debug access via JTAG and Serial Wire
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interfaces, and IEEE 1149.1-1990 compliant Test Access Port (TAP) controller
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o Industrial-range (-40°C to 85°C) RoHS-compliant 64-pin LQFP
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On-Board GPIO Usage
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===================
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PIN SIGNAL(S) LanchPad Function
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--- ---------------------------------------- ---------------------------------------
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17 PA0/U0RX DEBUG/VCOM, Virtual COM port receive
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18 PA1/U0TX DEBUG/VCOM, Virtual COM port transmit
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19 PA2/SSIOCLK GPIO, J2 pin 10
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20 PA3/SSIOFSS GPIO, J2 pin 9
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21 PA4/SSIORX GPIO, J2 pin 8
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22 PA5/SSIOTX GPIO, J1 pin 8
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23 PA6/I2CLSCL GPIO, J1 pin 9
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24 PA7/I2CLSDA GPIO, J1 pin 10
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45 PB0/T2CCP0/U1Rx GPIO, J1 pin 3
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46 PB1/T2CCP1/U1Tx GPIO, J1 pin 4
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47 PB2/I2C0SCL/T3CCP0 GPIO, J2, pin 3
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48 PB3/I2C0SDA/T3CCP1 GPIO, J4 pin 3
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58 PB4/AIN10/CAN0Rx/SSI2CLK/T1CCP0 GPIO, J1 pin 7
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57 PB5/AIN11/CAN0Tx/SSI2FSS/T1CCP1 GPIO, J1 pin 2
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01 PB6/SSI2RX/T0CCP0 GPIO, J2 pin 7
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04 PB7/SSI2TX/T0CCP1 GPIO, J2 pin 6
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52 PC0/SWCLK/T4CCP0/TCK DEBUG/VCOM
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51 PC1/SWDIO/T4CCP1/TMS DEBUG/VCOM
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50 PC2/T5CCP0/TDI DEBUG/VCOM
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49 PC3/SWO/T5CCP1/TDO DEBUG/VCOM
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16 PC4/C1-/U1RTS/U1RX/U4RX/WT0CCP0 GPIO, J4 pin 4
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15 PC5/C1+/U1CTS/U1TX/U4TX/WT0CCP1 GPIO, J4 pin 5
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14 PC6/C0+/U3RX/WT1CCP0 GPIO, J4 pin 6
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13 PC7/C0-/U3TX/WT1CCP1 GPIO, J4 pin 7
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61 PD0/AIN7/I2C3SCL/SSI1CLK/SSI3CLKWT2CCP0 Connects to PB6 via resistor, GPIO, J3 pin 3
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62 PD1/AIN6/I2C3SDA/SSI1Fss/SSI3Fss/WT2CCP1 Connects to PB7 via resistor, GPIO, J3 Pin 4
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63 PD2/AIN5/SSI1RX/SSI3RX/WT3CCP0 GPIO, J3 pin 5
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64 PD3/AIN4/SSI1TX/SSI3TX/WT3CCP1 GPIO, J3 pin 6
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43 PD4/U6RX/USB0DM/WT4CCP0 USB_DM
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44 PD5/U6TX/USB0DP/WT4CCP1 USB_DP
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53 PD6/U2RX/WT5CCP0 GPIO, J4 pin 8
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10 PD7/NMI/U2TX/WT5CCP1 +USB_VBUS, GPIO, J4 pin 9
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Used for VBUS detection when
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configured as a self-powered USB
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Device
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09 PE0/AIN3/U7RX GPIO, J2 pin 3
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08 PE1/AIN2/U7TX GPIO, J3 pin 7
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07 PE2/AIN1 GPIO, J3 pin 8
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06 PE3/AIN0 GPIO, J3 pin 9
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59 PE4/AIN9/CAN0RX/I2C2SCL/U5RX GPIO, J1 pin 5
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60 PE5/AIN8/CAN0TX/I2C2SDA/U5TX GPIO, J1 pin 6
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28 PF0/C0O/CAN0RX/NMI/SSI1RX/T0CCP0/U1RTS USR_SW2 (Low when pressed), GPIO, J2 pin 4
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29 PF1/C1O/SSI1TX/T0CCP1/TRD1/U1CTS LED_R, GPIO, J3 pin 10
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30 PF2/SSI1CLK/T1CCP0/TRD0 LED_B, GPIO, J4 pin 1
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31 PF3/CAN0TX/SSI1FSS/T1CCP1/TRCLK LED_G, GPIO, J4 pin 2
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05 PF4/T2CCP0 USR_SW1 (Low when pressed), GPIO, J4 pin 10
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Using OpenOCD and GDB with an FT2232 JTAG emulator
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Building OpenOCD under Cygwin:
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Refer to boards/olimex-lpc1766stk/README.txt
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Installing OpenOCD in Linux:
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sudo apt-get install openocd
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As of this writing, there is no support for the lm4f120 in the package
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above. You will have to build openocd from its source (as of this writing
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the latest commit was b9b4bd1a6410ff1b2885d9c2abe16a4ae7cb885f):
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git clone http://git.code.sf.net/p/openocd/code openocd
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cd openocd
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Then, add the patches provided by http://openocd.zylin.com/922:
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git fetch http://openocd.zylin.com/openocd refs/changes/22/922/14 && git checkout FETCH_HEAD
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./bootstrap
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./configure --enable-maintainer-mode --enable-ti-icdi
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make
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sudo make install
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For additional help, see http://processors.wiki.ti.com/index.php/Stellaris_Launchpad_with_OpenOCD_and_Linux
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Helper Scripts.
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I have been using the on-board In-Circuit Debug Interface (ICDI) interface.
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OpenOCD requires a configuration file. I keep the one I used last here:
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boards/lm4f120-launchpad/tools/lm4f120-launchpad.cfg
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However, the "correct" configuration script to use with OpenOCD may
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change as the features of OpenOCD evolve. So you should at least
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compare that lm4f120-launchpad.cfg file with configuration files in
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/usr/share/openocd/scripts. As of this writing, the configuration
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files of interest were:
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/usr/local/share/openocd/scripts/board/ek-lm4f120xl.cfg
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/usr/local/share/openocd/scripts/interface/ti-icdi.cfg
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/usr/local/share/openocd/scripts/target/stellaris_icdi.cfg
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There is also a script on the tools/ directory that I use to start
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the OpenOCD daemon on my system called oocd.sh. That script will
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probably require some modifications to work in another environment:
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- Possibly the value of OPENOCD_PATH and TARGET_PATH
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- It assumes that the correct script to use is the one at
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boards/lm4f120-launchpad/tools/lm4f120-launchpad.cfg
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Starting OpenOCD
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If you are in the top-level NuttX build directlory then you should
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be able to start the OpenOCD daemon like:
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oocd.sh $PWD
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provided that you have the path to the oocd.sh script, boards/lm4f120-launchpad/tools,
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added to your PATH variable.
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Note that OpenOCD needs to be run with administrator privileges in
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some environments (sudo).
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Connecting GDB
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Once the OpenOCD daemon has been started, you can connect to it via
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GDB using the following GDB command:
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arm-nuttx-elf-gdb
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(gdb) target remote localhost:3333
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NOTE: The name of your GDB program may differ. For example, with the
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CodeSourcery toolchain, the ARM GDB would be called arm-none-eabi-gdb.
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After starting GDB, you can load the NuttX ELF file:
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(gdb) symbol-file nuttx
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(gdb) monitor reset
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(gdb) monitor halt
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(gdb) load nuttx
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NOTES:
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1. Loading the symbol-file is only useful if you have built NuttX to
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include debug symbols (by setting CONFIG_DEBUG_SYMBOLS=y in the
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.config file).
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2. The MCU must be halted prior to loading code using 'mon reset'
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as described below.
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OpenOCD will support several special 'monitor' commands. These
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GDB commands will send comments to the OpenOCD monitor. Here
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are a couple that you will need to use:
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(gdb) monitor reset
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(gdb) monitor halt
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NOTES:
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1. The MCU must be halted using 'mon halt' prior to loading code.
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2. Reset will restart the processor after loading code.
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3. The 'monitor' command can be abbreviated as just 'mon'.
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LEDs
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^^^^
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The LM4F120 has a single RGB LED. If CONFIG_ARCH_LEDS is defined, then
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support for the LaunchPad LEDs will be included in the build. See:
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- boards/lm4f120-launchpad/include/board.h - Defines LED constants, types and
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prototypes the LED interface functions.
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- boards/lm4f120-launchpad/src/lm4f120-launchpad.h - GPIO settings for the LEDs.
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- boards/lm4f120-launchpad/src/up_leds.c - LED control logic.
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OFF:
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- OFF means that the OS is still initializing. Initialization is very fast so
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if you see this at all, it probably means that the system is hanging up
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somewhere in the initialization phases.
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GREEN or GREEN-ish
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- This means that the OS completed initialization.
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Bluish:
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- Whenever and interrupt or signal handler is entered, the BLUE LED is
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illuminated and extinguished when the interrupt or signal handler exits.
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This will add a BLUE-ish tinge to the LED.
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Redish:
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- If a recovered assertion occurs, the RED component will be illuminated
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briefly while the assertion is handled. You will probably never see this.
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Flashing RED:
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- In the event of a fatal crash, the BLUE and GREEN components will be
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extinguished and the RED component will FLASH at a 2Hz rate.
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Serial Console
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^^^^^^^^^^^^^^
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By default, all configurations use UART0 which connects to the USB VCOM
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on the DEBUG port on the LM4F120 LaunchPad:
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UART0 RX - PA.0
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UART0 TX - PA.1
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However, if you use an external RS232 driver, then other options are
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available. UART1 has option pin settings and flow control capabilities
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that are not available with the other UARTS::
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UART1 RX - PB.0 or PC.4 (Need disambiguation in board.h)
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UART1 TX - PB.1 or PC.5 (" " " " "" " ")
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UART1_RTS - PF.0 or PC.4
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UART1_CTS - PF.1 or PC.5
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NOTE: board.h currently selects PB.0, PB.1, PF.0 and PF.1 for UART1, but
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that can be changed by editing board.h
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UART2-5, 7 are also available, UART2 is not recommended because it shares
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some pin usage with USB device mode. UART6 is not available because its
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only RX/TX pin options are dedicated to USB support.
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UART2 RX - PD.6
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UART2 TX - PD.7 (Also used for USB VBUS detection)
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UART3 RX - PC.6
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UART3 TX - PC.7
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UART4 RX - PC.4
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UART4 TX - PC.5
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UART5 RX - PE.4
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UART5 TX - PE.5
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UART6 RX - PD.4, Not available. Dedicated for USB_DM
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UART6 TX - PD.5, Not available. Dedicated for USB_DP
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UART7 RX - PE.0
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UART7 TX - PE.1
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USB Device Controller Functions
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Device Overview
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An FT2232 device from Future Technology Devices International Ltd manages
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USB-to-serial conversion. The FT2232 is factory configured by Luminary
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Micro to implement a JTAG/SWD port (synchronous serial) on channel A and
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a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous
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communications links between the host computer and the target device using
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a single USB cable. Separate Windows drivers for each function are provided
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on the Documentation and Software CD.
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Debugging with JTAG/SWD
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The FT2232 USB device performs JTAG/SWD serial operations under the control
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of the debugger or the Luminary Flash Programmer. It also operate as an
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In-Circuit Debugger Interface (ICDI), allowing debugging of any external
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target board. Debugging modes:
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MODE DEBUG FUNCTION USE SELECTED BY
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1 Internal ICDI Debug on-board LM4F120 Default Mode
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microcontroller over USB
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interface.
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2 ICDI out to JTAG/SWD The EVB is used as a USB Connecting to an external
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header to SWD/JTAG interface to target and starting debug
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an external target. software. The red Debug Out
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LED will be ON.
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3 In from JTAG/SWD For users who prefer an Connecting an external
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header external debug interface debugger to the JTAG/SWD
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(ULINK, JLINK, etc.) with header.
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the EVB.
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Virtual COM Port
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The Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal)
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to communicate with UART0 on the LM4F120 over USB. Once the FT2232 VCP
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driver is installed, Windows assigns a COM port number to the VCP channel.
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LM4F120 LaunchPad Configuration Options
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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CONFIG_ARCH - Identifies the arch/ subdirectory. This should
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be set to:
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CONFIG_ARCH=arm
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CONFIG_ARCH_family - For use in C code:
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_architecture - For use in C code:
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CONFIG_ARCH_CORTEXM3=y
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CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
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CONFIG_ARCH_CHIP=lm
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CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
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chip:
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CONFIG_ARCH_CHIP_LM4F120
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CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
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hence, the board that supports the particular chip or SoC.
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CONFIG_ARCH_BOARD=lm4f120-launchpad (for the LM4F120 LaunchPad)
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CONFIG_ARCH_BOARD_name - For use in C code
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CONFIG_ARCH_BOARD_LM4F120_LAUNCHPAD
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CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
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of delay loops
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CONFIG_ENDIAN_BIG - define if big endian (default is little
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endian)
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CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
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CONFIG_RAM_SIZE=0x00010000 (64Kb)
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CONFIG_RAM_START - The start address of installed DRAM
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CONFIG_RAM_START=0x20000000
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CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
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have LEDs
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CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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stack. If defined, this symbol is the size of the interrupt
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stack in bytes. If not defined, the user task stacks will be
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used during interrupt handling.
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CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
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CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
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There are configurations for disabling support for interrupts GPIO ports.
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GPIOJ must be disabled because it does not exist on the LM4F120.
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Additional interrupt support can be disabled if desired to reduce memory
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footprint.
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CONFIG_TIVA_GPIOA_IRQS=y
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CONFIG_TIVA_GPIOB_IRQS=y
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CONFIG_TIVA_GPIOC_IRQS=y
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CONFIG_TIVA_GPIOD_IRQS=y
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CONFIG_TIVA_GPIOE_IRQS=y
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CONFIG_TIVA_GPIOF_IRQS=y
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CONFIG_TIVA_GPIOG_IRQS=y
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CONFIG_TIVA_GPIOH_IRQS=y
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CONFIG_TIVA_GPIOJ_IRQS=n << Always
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LM4F120 specific device driver settings
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CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the
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console and ttys0 (default is the UART0).
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CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
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This specific the size of the receive buffer
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CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
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being sent. This specific the size of the transmit buffer
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CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be
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CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8.
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CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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CONFIG_UARTn_2STOP - Two stop bits
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CONFIG_TIVA_SSI0 - Select to enable support for SSI0
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CONFIG_TIVA_SSI1 - Select to enable support for SSI1
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CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support.
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Poll-waiting is recommended if the interrupt rate would be to
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high in the interrupt driven case.
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CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before
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emptying the Rx FIFO. If the SPI frequency is high and this
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value is large, then larger values of this setting may cause
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Rx FIFO overrun errors. Default: half of the Tx FIFO size (4).
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CONFIG_TIVA_ETHERNET - This must be set (along with CONFIG_NET)
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to build the Stellaris Ethernet driver
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CONFIG_TIVA_ETHLEDS - Enable to use Ethernet LEDs on the board.
|
|
CONFIG_TIVA_BOARDMAC - If the board-specific logic can provide
|
|
a MAC address (via tiva_ethernetmac()), then this should be selected.
|
|
CONFIG_TIVA_ETHHDUPLEX - Set to force half duplex operation
|
|
CONFIG_TIVA_ETHNOAUTOCRC - Set to suppress auto-CRC generation
|
|
CONFIG_TIVA_ETHNOPAD - Set to suppress Tx padding
|
|
CONFIG_TIVA_MULTICAST - Set to enable multicast frames
|
|
CONFIG_TIVA_PROMISCUOUS - Set to enable promiscuous mode
|
|
CONFIG_TIVA_BADCRC - Set to enable bad CRC rejection.
|
|
CONFIG_TIVA_DUMPPACKET - Dump each packet received/sent to the console.
|
|
|
|
Configurations
|
|
^^^^^^^^^^^^^^
|
|
|
|
Each LM4F120 LaunchPad configuration is maintained in a
|
|
sub-directory and can be selected as follow:
|
|
|
|
tools/configure.sh lm4f120-launchpad/<subdir>
|
|
|
|
Where <subdir> is one of the following:
|
|
|
|
nsh:
|
|
---
|
|
Configures the NuttShell (nsh) located at apps/examples/nsh. The
|
|
configuration enables the serial VCOM interfaces on UART0. Support for
|
|
builtin applications is enabled, but in the base configuration no
|
|
builtin applications are selected.
|
|
|
|
NOTES:
|
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
change this configuration using that tool, you should:
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
|
see additional README.txt files in the NuttX tools repository.
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
reconfiguration process.
|
|
|
|
2. By default, this configuration uses the CodeSourcery toolchain
|
|
for Windows and builds under Cygwin (or probably MSYS). That
|
|
can easily be reconfigured, of course.
|
|
|
|
CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too).
|
|
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc)
|
|
CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary
|