d04e1ebf4e
Signed-off-by: liaoao <liaoao@xiaomi.com>
958 lines
24 KiB
C
958 lines
24 KiB
C
/****************************************************************************
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* drivers/coresight/coresight_core.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <errno.h>
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#include <debug.h>
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#include <stdbool.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/irq.h>
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#include <nuttx/coresight/coresight.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* Used for build path */
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struct coresight_node_s
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{
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FAR struct coresight_dev_s *csdev;
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struct list_node link;
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static struct list_node g_csdev_list = LIST_INITIAL_VALUE(g_csdev_list);
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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#ifdef CONFIG_PM
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/****************************************************************************
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* Name: coresight_notify_pm
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****************************************************************************/
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static void coresight_notify_pm(struct pm_callback_s *cb, int domain,
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enum pm_state_e pmstate)
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{
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FAR struct coresight_dev_s *csdev =
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container_of(cb, struct coresight_dev_s, pmcb);
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enum pm_state_e oldstate;
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if (csdev->refcnt == 0 || domain != PM_IDLE_DOMAIN)
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{
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return;
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}
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oldstate = pm_querystate(PM_IDLE_DOMAIN);
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switch (oldstate)
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{
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case PM_NORMAL:
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case PM_IDLE:
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case PM_STANDBY:
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if (pmstate == PM_SLEEP)
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{
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clk_disable(csdev->clk);
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}
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break;
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case PM_SLEEP:
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if (pmstate == PM_NORMAL || pmstate == PM_IDLE ||
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pmstate == PM_STANDBY)
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{
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if (clk_enable(csdev->clk) <= 0)
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{
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cserr("clk enable failed when pm state change\n");
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}
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}
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break;
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default:
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break;
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}
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}
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#endif
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#ifdef CONFIG_CLK
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/****************************************************************************
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* Name: coresight_enable_clk
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****************************************************************************/
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static int coresight_enable_clk(FAR struct coresight_dev_s *csdev)
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{
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int ret;
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if (csdev->clk == NULL)
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{
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return 0;
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}
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ret = clk_enable(csdev->clk);
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if (ret < 0)
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{
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cserr("%s clk enable failed\n", csdev->name);
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return ret;
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}
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#ifdef CONFIG_PM
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if (csdev->pmcb.notify == NULL)
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{
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csdev->pmcb.notify = coresight_notify_pm;
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}
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ret = pm_register(&csdev->pmcb);
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if (ret < 0)
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{
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clk_disable(csdev->clk);
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cserr("%s register pm failed\n", csdev->name);
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return ret;
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}
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#endif
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return ret;
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}
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/****************************************************************************
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* Name: coresight_disable_clk
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****************************************************************************/
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static void coresight_disable_clk(FAR struct coresight_dev_s *csdev)
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{
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if (csdev->clk == NULL)
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{
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return;
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}
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#ifdef CONFIG_PM
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pm_unregister(&csdev->pmcb);
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#endif
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clk_disable(csdev->clk);
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}
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#else
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# define coresight_enable_clk(csdev) (0)
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# define coresight_disable_clk(csdev)
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#endif
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/****************************************************************************
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* Name: coresight_enable_sink
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****************************************************************************/
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static int coresight_enable_sink(FAR struct coresight_dev_s *csdev)
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{
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int ret;
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if (csdev->ops->sink_ops->enable == NULL)
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{
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return -EINVAL;
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}
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if (csdev->refcnt++ != 0)
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{
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return 0;
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}
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ret = coresight_enable_clk(csdev);
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if (ret < 0)
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{
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csdev->refcnt--;
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return ret;
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}
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ret = csdev->ops->sink_ops->enable(csdev);
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if (ret >= 0)
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{
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return ret;
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}
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csdev->refcnt--;
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coresight_disable_clk(csdev);
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cserr("%s enable failed\n", csdev->name);
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return ret;
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}
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/****************************************************************************
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* Name: coresight_disable_sink
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****************************************************************************/
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static void coresight_disable_sink(FAR struct coresight_dev_s *csdev)
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{
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if (csdev->ops->sink_ops->disable == NULL)
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{
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return;
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}
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if (--csdev->refcnt != 0)
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{
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return;
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}
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csdev->ops->sink_ops->disable(csdev);
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coresight_disable_clk(csdev);
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}
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/****************************************************************************
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* Name: coresight_find_link_inport
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****************************************************************************/
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static int coresight_find_link_inport(FAR struct coresight_dev_s *csdev,
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FAR struct coresight_dev_s *prev)
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{
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FAR struct coresight_connect_s *conn;
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int i;
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for (i = 0; i < prev->outport_num; i++)
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{
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conn = &prev->outconns[i];
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if (conn->destdev == csdev)
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{
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return conn->destport;
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}
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}
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return -ENODEV;
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}
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/****************************************************************************
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* Name: coresight_find_link_outport
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****************************************************************************/
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static int coresight_find_link_outport(FAR struct coresight_dev_s *csdev,
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FAR struct coresight_dev_s *next)
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{
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FAR struct coresight_connect_s *conn;
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int i;
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for (i = 0; i < csdev->outport_num; i++)
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{
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conn = &csdev->outconns[i];
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if (conn->destdev == next)
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{
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return conn->srcport;
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}
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}
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return -ENODEV;
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}
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/****************************************************************************
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* Name: coresight_enable_link
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****************************************************************************/
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static int coresight_enable_link(FAR struct coresight_dev_s *csdev,
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FAR struct coresight_dev_s *prev,
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FAR struct coresight_dev_s *next)
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{
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int inport = 0;
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int outport = 0;
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int ret;
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if (csdev->ops->link_ops->enable == NULL)
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{
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return -EINVAL;
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}
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if (csdev->subtype.link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
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{
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inport = coresight_find_link_inport(csdev, prev);
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if (inport < 0)
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{
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return inport;
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}
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}
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if (csdev->subtype.link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
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{
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outport = coresight_find_link_outport(csdev, next);
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if (outport < 0)
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{
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return outport;
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}
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}
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if (csdev->refcnt++ == 0)
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{
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ret = coresight_enable_clk(csdev);
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if (ret < 0)
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{
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csdev->refcnt--;
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return ret;
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}
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}
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ret = csdev->ops->link_ops->enable(csdev, inport, outport);
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if (ret < 0)
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{
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if (--csdev->refcnt == 0)
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{
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coresight_disable_clk(csdev);
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}
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return ret;
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}
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return ret;
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}
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/****************************************************************************
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* Name: coresight_disable_link
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****************************************************************************/
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static void coresight_disable_link(FAR struct coresight_dev_s *csdev,
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FAR struct coresight_dev_s *prev,
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FAR struct coresight_dev_s *next)
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{
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int inport;
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int outport;
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if (csdev->ops->sink_ops->disable == NULL)
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{
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return;
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}
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inport = coresight_find_link_inport(csdev, prev);
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outport = coresight_find_link_outport(csdev, next);
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csdev->ops->link_ops->disable(csdev, inport, outport);
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if (--csdev->refcnt == 0)
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{
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coresight_disable_clk(csdev);
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}
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}
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/****************************************************************************
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* Name: coresight_enable_source
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****************************************************************************/
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static int coresight_enable_source(FAR struct coresight_dev_s *csdev)
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{
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int ret;
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if (csdev->ops->source_ops->enable == NULL)
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{
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return -EINVAL;
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}
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if (csdev->refcnt++ != 0)
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{
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return 0;
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}
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ret = coresight_enable_clk(csdev);
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if (ret < 0)
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{
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csdev->refcnt--;
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return ret;
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}
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ret = csdev->ops->source_ops->enable(csdev);
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if (ret >= 0)
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{
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return ret;
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}
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csdev->refcnt--;
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coresight_disable_clk(csdev);
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cserr("%s enable failed\n", csdev->name);
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return ret;
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}
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/****************************************************************************
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* Name: coresight_disable_source
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****************************************************************************/
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static void coresight_disable_source(FAR struct coresight_dev_s *csdev)
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{
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if (csdev->ops->source_ops->disable == NULL)
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{
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return;
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}
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if (--csdev->refcnt != 0)
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{
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return;
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}
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csdev->ops->source_ops->disable(csdev);
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coresight_disable_clk(csdev);
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}
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/****************************************************************************
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* Name: coresight_validate_source
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*
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* Description:
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* Indicate if this coresight device is a valid source device.
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*
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****************************************************************************/
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static int coresight_validate_source(FAR struct coresight_dev_s *csdev)
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{
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uint8_t type = csdev->type;
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uint8_t subtype = csdev->subtype.source_subtype;
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if (type != CORESIGHT_DEV_TYPE_SOURCE)
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{
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cserr("not a source coresight device\n");
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return -EINVAL;
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}
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if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
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subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE)
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{
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cserr("not a supported subtype of source device\n");
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return -EINVAL;
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}
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return 0;
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}
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/****************************************************************************
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* Name: coresight_build_path
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*
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* Description:
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* Build path from srcdev to destdev.
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*
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* Input Parameters:
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* srcdev - Pointer to the source device.
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* destdev - Pointer to the destination device.
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* path - Pointer to the path which will save all the coresight devices
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* through source device to destination device.
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*
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* Returned Value:
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* Zero on success; a negative value on failure.
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*
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****************************************************************************/
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static int coresight_build_path(FAR struct coresight_dev_s *srcdev,
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FAR struct coresight_dev_s *destdev,
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FAR struct list_node *path)
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{
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FAR struct coresight_node_s *node;
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bool found = false;
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int i;
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if (srcdev == destdev)
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{
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goto out;
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}
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for (i = 0; i < srcdev->outport_num; i++)
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{
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struct coresight_dev_s *csdev = srcdev->outconns[i].destdev;
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if (csdev && coresight_build_path(csdev, destdev, path) == 0)
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{
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found = true;
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break;
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}
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}
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if (!found)
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{
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return -ENODEV;
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}
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out:
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node = kmm_malloc(sizeof(struct coresight_node_s));
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if (node == NULL)
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{
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return -ENOMEM;
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}
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node->csdev = srcdev;
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list_add_head(path, &node->link);
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return 0;
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}
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/****************************************************************************
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* Name: coresight_release_path
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*
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* Description:
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* Release memory malloced through the path.
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*
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****************************************************************************/
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static void coresight_release_path(FAR struct list_node *path)
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{
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FAR struct coresight_node_s *node;
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FAR struct coresight_node_s *next;
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list_for_every_entry_safe(path, node, next, struct coresight_node_s, link)
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{
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list_delete(&node->link);
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kmm_free(node);
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}
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}
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/****************************************************************************
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* Name: coresight_disable_dev
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****************************************************************************/
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static void coresight_disable_dev(FAR struct coresight_node_s *node)
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{
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switch (node->csdev->type)
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{
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case CORESIGHT_DEV_TYPE_SINK:
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coresight_disable_sink(node->csdev);
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break;
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case CORESIGHT_DEV_TYPE_LINK:
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{
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FAR struct coresight_node_s *prev =
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list_prev_entry(node, struct coresight_node_s, link);
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FAR struct coresight_node_s *next =
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list_next_entry(node, struct coresight_node_s, link);
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coresight_disable_link(node->csdev, prev->csdev, next->csdev);
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}
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break;
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/* We skip the first node in the path assuming that it is the source,
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* and it will be disabled in coresight_disable. So we don't expect a
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* source device in the middle of a path.
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*/
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default:
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DEBUGASSERT(0);
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break;
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}
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}
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/****************************************************************************
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* Name: coresight_disable_path_from
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*
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* Description:
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* Disable coresight devices from specific node.
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*
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* Input Parameters:
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* path - Head of the path.
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* node - Start position to search, it begins from next of this node to
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* disable.
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*
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****************************************************************************/
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static void coresight_disable_path_from(FAR struct list_node *path,
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FAR struct coresight_node_s *node)
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{
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list_for_every_entry_continue(node, path, struct coresight_node_s, link)
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{
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coresight_disable_dev(node);
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}
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}
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/****************************************************************************
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* Name: coresight_disable_path
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*
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* Description:
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* Disable all the coresight devices through the path except source device.
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* Source device will be disabled by coresight_disable or perf end
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* function.
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*
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****************************************************************************/
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static void coresight_disable_path(FAR struct list_node *path)
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{
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coresight_disable_path_from(path,
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container_of(path->next, struct coresight_node_s, link));
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}
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/****************************************************************************
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* Name: coresight_enable_path
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*
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* Description:
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* Enable all coresight devices through the path in reverse order.
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*
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* Input Parameters:
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* path - path from source device to sink device.
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*
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* Returned Value:
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* Zero on success; a negative value on failure.
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*
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****************************************************************************/
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static int coresight_enable_path(FAR struct list_node *path)
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{
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FAR struct coresight_node_s *node;
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int ret = 0;
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list_for_every_entry_reverse(path, node, struct coresight_node_s, link)
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{
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switch (node->csdev->type)
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{
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/* Sink device is the first device to be enable. No need to disable
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* other coresight device in the path if it enabled failed.
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*/
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case CORESIGHT_DEV_TYPE_SINK:
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ret = coresight_enable_sink(node->csdev);
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if (ret < 0)
|
||
{
|
||
cserr("enalbe sink: %s failed ret: %d\n",
|
||
node->csdev->name, ret);
|
||
return ret;
|
||
}
|
||
break;
|
||
|
||
case CORESIGHT_DEV_TYPE_LINK:
|
||
{
|
||
FAR struct coresight_node_s *prev =
|
||
list_prev_entry(node, struct coresight_node_s, link);
|
||
FAR struct coresight_node_s *next =
|
||
list_next_entry(node, struct coresight_node_s, link);
|
||
ret = coresight_enable_link(node->csdev, prev->csdev,
|
||
next->csdev);
|
||
if (ret < 0)
|
||
{
|
||
cserr("enalbe link: %s failed ret: %d\n",
|
||
node->csdev->name, ret);
|
||
goto err;
|
||
}
|
||
}
|
||
break;
|
||
|
||
/* Source device will be enabled in coresight_enable or
|
||
* perf start function.
|
||
*/
|
||
|
||
case CORESIGHT_DEV_TYPE_SOURCE:
|
||
break;
|
||
|
||
default:
|
||
cserr("invalid coresight device type through the path\n");
|
||
DEBUGASSERT(0);
|
||
goto err;
|
||
}
|
||
}
|
||
|
||
return ret;
|
||
|
||
err:
|
||
coresight_disable_path_from(path, node);
|
||
return ret;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: coresight_find_dev
|
||
****************************************************************************/
|
||
|
||
static FAR struct coresight_dev_s *coresight_find_dev(FAR const char *name)
|
||
{
|
||
FAR struct coresight_dev_s *tempdev;
|
||
irqstate_t flags;
|
||
|
||
flags = enter_critical_section();
|
||
list_for_every_entry(&g_csdev_list, tempdev, struct coresight_dev_s, node)
|
||
{
|
||
if (strcmp(tempdev->name, name) == 0)
|
||
{
|
||
leave_critical_section(flags);
|
||
return tempdev;
|
||
}
|
||
}
|
||
|
||
leave_critical_section(flags);
|
||
return NULL;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Public Functions
|
||
****************************************************************************/
|
||
|
||
/****************************************************************************
|
||
* Name: coresight_register
|
||
*
|
||
* Description:
|
||
* Register a coresight device to the coresight bus.
|
||
*
|
||
* Input Parameters:
|
||
* csdev - Pointer to the coresight device that needs to be registered.
|
||
* desc - Pointer to the attribute description of this coresight device.
|
||
*
|
||
* Returned Value:
|
||
* Zero on success; a negative value on failure.
|
||
*
|
||
****************************************************************************/
|
||
|
||
int coresight_register(FAR struct coresight_dev_s *csdev,
|
||
FAR const struct coresight_desc_s *desc)
|
||
{
|
||
FAR struct coresight_dev_s *tempdev;
|
||
irqstate_t flags;
|
||
int i;
|
||
|
||
if (coresight_find_dev(desc->name) != NULL)
|
||
{
|
||
cserr("device has been registered!\n");
|
||
return -EEXIST;
|
||
}
|
||
|
||
csdev->name = desc->name;
|
||
csdev->addr = desc->addr;
|
||
csdev->type = desc->type;
|
||
csdev->subtype = desc->subtype;
|
||
csdev->outport_num = desc->outport_num;
|
||
list_initialize(&csdev->path);
|
||
|
||
#ifdef CONFIG_CLK
|
||
if (desc->clkname != NULL)
|
||
{
|
||
csdev->clk = clk_get(desc->clkname);
|
||
if (csdev->clk == NULL)
|
||
{
|
||
cserr("get device clk failed\n");
|
||
return -ENODEV;
|
||
}
|
||
}
|
||
#endif
|
||
|
||
if (csdev->outport_num > 0)
|
||
{
|
||
csdev->outconns =
|
||
kmm_zalloc(sizeof(struct coresight_connect_s) * desc->outport_num);
|
||
if (csdev->outconns == NULL)
|
||
{
|
||
return -ENOMEM;
|
||
}
|
||
|
||
for (i = 0; i < csdev->outport_num; i++)
|
||
{
|
||
FAR struct coresight_connect_s *conn = &csdev->outconns[i];
|
||
FAR const struct coresight_portdesc_s *portdesc =
|
||
&desc->outports[i];
|
||
|
||
conn->srcport = i;
|
||
conn->destport = portdesc->port;
|
||
conn->destname = portdesc->remote;
|
||
conn->srcdev = csdev;
|
||
}
|
||
}
|
||
|
||
flags = enter_critical_section();
|
||
list_for_every_entry(&g_csdev_list, tempdev, struct coresight_dev_s, node)
|
||
{
|
||
for (i = 0; i < tempdev->outport_num; i++)
|
||
{
|
||
FAR struct coresight_connect_s *conn = &tempdev->outconns[i];
|
||
if (strcmp(conn->destname, csdev->name) == 0)
|
||
{
|
||
conn->destdev = csdev;
|
||
}
|
||
}
|
||
|
||
for (i = 0; i < csdev->outport_num; i++)
|
||
{
|
||
FAR struct coresight_connect_s *conn = &csdev->outconns[i];
|
||
if (strcmp(conn->destname, tempdev->name) == 0)
|
||
{
|
||
conn->destdev = tempdev;
|
||
}
|
||
}
|
||
}
|
||
|
||
list_add_tail(&g_csdev_list, &csdev->node);
|
||
leave_critical_section(flags);
|
||
|
||
return 0;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: coresight_unregister
|
||
*
|
||
* Description:
|
||
* Unregister a coresight device from coresight bus.
|
||
*
|
||
* Input Parameters:
|
||
* csdev - Pointer to the coresight device that needs to be unregistered.
|
||
*
|
||
****************************************************************************/
|
||
|
||
void coresight_unregister(FAR struct coresight_dev_s *csdev)
|
||
{
|
||
FAR struct coresight_dev_s *tempdev;
|
||
irqstate_t flags;
|
||
int i;
|
||
|
||
flags = enter_critical_section();
|
||
list_for_every_entry(&g_csdev_list, tempdev, struct coresight_dev_s, node)
|
||
{
|
||
if (csdev == tempdev)
|
||
{
|
||
continue;
|
||
}
|
||
|
||
for (i = 0; i < tempdev->outport_num; i++)
|
||
{
|
||
FAR struct coresight_connect_s *conn = &tempdev->outconns[i];
|
||
if (conn->destdev == csdev)
|
||
{
|
||
conn->destdev = NULL;
|
||
}
|
||
}
|
||
}
|
||
|
||
if (csdev->refcnt > 0)
|
||
{
|
||
switch (csdev->type)
|
||
{
|
||
case CORESIGHT_DEV_TYPE_SINK:
|
||
if (csdev->ops->sink_ops->disable != NULL)
|
||
{
|
||
csdev->ops->sink_ops->disable(csdev);
|
||
}
|
||
break;
|
||
|
||
case CORESIGHT_DEV_TYPE_SOURCE:
|
||
if (csdev->ops->source_ops->disable != NULL)
|
||
{
|
||
csdev->ops->source_ops->disable(csdev);
|
||
}
|
||
break;
|
||
|
||
/* Link devices may have multiple inport or outport, it can
|
||
* not be distinguished here which one of them has been enabled.
|
||
* so disable inport/outports in its own unregister function.
|
||
*/
|
||
|
||
default:
|
||
break;
|
||
}
|
||
|
||
coresight_disable_clk(csdev);
|
||
}
|
||
|
||
list_delete(&csdev->node);
|
||
leave_critical_section(flags);
|
||
|
||
if (csdev->outport_num > 0)
|
||
{
|
||
kmm_free(csdev->outconns);
|
||
csdev->outconns = NULL;
|
||
}
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: coresight_enable
|
||
*
|
||
* Description:
|
||
* Enable trace start from srcdev to destdev.
|
||
*
|
||
* Input Parameters:
|
||
* srcdev - Source device that generates trace data.
|
||
* destdev - Sink device that finally accepts the trace data.
|
||
*
|
||
* Returned Value:
|
||
* Zero on success; a negative value on failure.
|
||
*
|
||
****************************************************************************/
|
||
|
||
int coresight_enable(FAR struct coresight_dev_s *srcdev,
|
||
FAR struct coresight_dev_s *destdev)
|
||
{
|
||
FAR struct coresight_node_s *node;
|
||
irqstate_t flags;
|
||
int ret;
|
||
|
||
ret = coresight_validate_source(srcdev);
|
||
if (ret < 0)
|
||
{
|
||
return ret;
|
||
}
|
||
|
||
flags = enter_critical_section();
|
||
|
||
if (list_is_empty(&srcdev->path))
|
||
{
|
||
ret = coresight_build_path(srcdev, destdev, &srcdev->path);
|
||
if (ret < 0)
|
||
{
|
||
cserr("build path failed from %s ret: %d\n", srcdev->name, ret);
|
||
goto err_path;
|
||
}
|
||
}
|
||
|
||
ret = coresight_enable_path(&srcdev->path);
|
||
if (ret < 0)
|
||
{
|
||
cserr("enable path failed from %s ret: %d\n", srcdev->name, ret);
|
||
goto err_path;
|
||
}
|
||
|
||
ret = coresight_enable_source(srcdev);
|
||
if (ret < 0)
|
||
{
|
||
cserr("enable source failed %s ret: %d\n", srcdev->name, ret);
|
||
goto err_source;
|
||
}
|
||
|
||
csinfo("trace enabled success while devices are:");
|
||
list_for_every_entry(&srcdev->path, node, struct coresight_node_s, link)
|
||
{
|
||
csinfo("-> %s", node->csdev->name);
|
||
}
|
||
|
||
out:
|
||
leave_critical_section(flags);
|
||
return ret;
|
||
|
||
err_source:
|
||
coresight_disable_path(&srcdev->path);
|
||
|
||
err_path:
|
||
coresight_release_path(&srcdev->path);
|
||
goto out;
|
||
}
|
||
|
||
/****************************************************************************
|
||
* Name: coresight_disable
|
||
*
|
||
* Description:
|
||
* Disable the trace start from srcdev to destdev.
|
||
*
|
||
* Input Parameters:
|
||
* srcdev - Source device that generates trace data.
|
||
*
|
||
****************************************************************************/
|
||
|
||
void coresight_disable(FAR struct coresight_dev_s *srcdev)
|
||
{
|
||
irqstate_t flags;
|
||
|
||
flags = enter_critical_section();
|
||
|
||
coresight_disable_source(srcdev);
|
||
coresight_disable_path(&srcdev->path);
|
||
coresight_release_path(&srcdev->path);
|
||
|
||
leave_critical_section(flags);
|
||
}
|