037c9ea0a4
Summary The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_. This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them: up_arch.h up_internal.h up_vfork.h The only change to the files is from including up_arch.h to arm_arch.h (for example). The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm. Impact There should be not impact of this change (other that one step toward more consistent naming). Testing stm32f4discovery:netnsh
128 lines
4.1 KiB
C
128 lines
4.1 KiB
C
/****************************************************************************
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* arch/arm/src/stm32h7/stm32_pmstop.c
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*
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* Copyright (C) 2018 Haltian Ltd. All rights reserved.
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* Author: Juha Niskanen <juha.niskanen@haltian.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include "arm_arch.h"
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#include "nvic.h"
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#include "stm32_pwr.h"
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#include "stm32_pm.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_pmstop
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*
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* Description:
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* Enter STOP mode.
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*
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* Input Parameters:
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* lpds - true: To further reduce power consumption in Stop mode, put the
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* internal voltage regulator in low-power under-drive mode using
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* the LPDS and LPUDS bits of the Power control register (PWR_CR1).
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_pmstop(bool lpds)
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{
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uint32_t regval;
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/* Clear the Low Power Deep Sleep (LPDS) bit in the CPU power control
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* register.
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*/
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regval = getreg32(STM32_PWR_CR1);
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regval &= ~(PWR_CR1_LPDS | PWR_CR1_SVOS_MASK);
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/* Set low-power regulator mode and voltage scaling. */
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if (lpds)
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{
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regval |= PWR_CR1_LPDS | PWR_CR1_SVOS_S5;
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}
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else
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{
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/* Set regulator to normal (S3) mode */
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regval |= PWR_CR1_SVOS_S3;
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}
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putreg32(regval, STM32_PWR_CR1);
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/* Clear the domain standby bits so D1, D2 and D3 remain in DStop mode */
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regval = getreg32(STM32_PWR_CPUCR);
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regval &= ~(STM32_PWR_CPUCR_PDDS_D1 | STM32_PWR_CPUCR_PDDS_D2 |
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STM32_PWR_CPUCR_PDDS_D3);
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putreg32(regval, STM32_PWR_CPUCR);
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/* Set SLEEPDEEP bit of Cortex System Control Register */
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regval = getreg32(NVIC_SYSCON);
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regval |= NVIC_SYSCON_SLEEPDEEP;
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putreg32(regval, NVIC_SYSCON);
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/* Sleep until the wakeup interrupt or event occurs */
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#ifdef CONFIG_PM_WFE
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/* Mode: SLEEP + Entry with WFE */
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asm volatile ("wfe");
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#else
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/* Mode: SLEEP + Entry with WFI */
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asm volatile ("wfi");
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#endif
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/* Clear deep sleep bits, so that MCU does not go into deep sleep in idle. */
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/* Clear SLEEPDEEP bit of Cortex System Control Register */
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regval = getreg32(NVIC_SYSCON);
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regval &= ~NVIC_SYSCON_SLEEPDEEP;
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putreg32(regval, NVIC_SYSCON);
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}
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