nuttx/arch/arm/src/stm32h7/stm32_pmstop.c
Gregory Nutt 037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00

128 lines
4.1 KiB
C

/****************************************************************************
* arch/arm/src/stm32h7/stm32_pmstop.c
*
* Copyright (C) 2018 Haltian Ltd. All rights reserved.
* Author: Juha Niskanen <juha.niskanen@haltian.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include "arm_arch.h"
#include "nvic.h"
#include "stm32_pwr.h"
#include "stm32_pm.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_pmstop
*
* Description:
* Enter STOP mode.
*
* Input Parameters:
* lpds - true: To further reduce power consumption in Stop mode, put the
* internal voltage regulator in low-power under-drive mode using
* the LPDS and LPUDS bits of the Power control register (PWR_CR1).
*
* Returned Value:
* None
*
****************************************************************************/
void stm32_pmstop(bool lpds)
{
uint32_t regval;
/* Clear the Low Power Deep Sleep (LPDS) bit in the CPU power control
* register.
*/
regval = getreg32(STM32_PWR_CR1);
regval &= ~(PWR_CR1_LPDS | PWR_CR1_SVOS_MASK);
/* Set low-power regulator mode and voltage scaling. */
if (lpds)
{
regval |= PWR_CR1_LPDS | PWR_CR1_SVOS_S5;
}
else
{
/* Set regulator to normal (S3) mode */
regval |= PWR_CR1_SVOS_S3;
}
putreg32(regval, STM32_PWR_CR1);
/* Clear the domain standby bits so D1, D2 and D3 remain in DStop mode */
regval = getreg32(STM32_PWR_CPUCR);
regval &= ~(STM32_PWR_CPUCR_PDDS_D1 | STM32_PWR_CPUCR_PDDS_D2 |
STM32_PWR_CPUCR_PDDS_D3);
putreg32(regval, STM32_PWR_CPUCR);
/* Set SLEEPDEEP bit of Cortex System Control Register */
regval = getreg32(NVIC_SYSCON);
regval |= NVIC_SYSCON_SLEEPDEEP;
putreg32(regval, NVIC_SYSCON);
/* Sleep until the wakeup interrupt or event occurs */
#ifdef CONFIG_PM_WFE
/* Mode: SLEEP + Entry with WFE */
asm volatile ("wfe");
#else
/* Mode: SLEEP + Entry with WFI */
asm volatile ("wfi");
#endif
/* Clear deep sleep bits, so that MCU does not go into deep sleep in idle. */
/* Clear SLEEPDEEP bit of Cortex System Control Register */
regval = getreg32(NVIC_SYSCON);
regval &= ~NVIC_SYSCON_SLEEPDEEP;
putreg32(regval, NVIC_SYSCON);
}