b49be4bb20
arch/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. sched/ audio/ crypto/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. Documentation/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. fs/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. graphics/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. net/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. drivers/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. include/, syscall/, wireless/: Removed all references to CONFIG_DISABLE_POLL. The standard POSIX poll() can not longer be disabled. configs/: Remove all references to CONFIG_DISABLE_POLL. Standard POSIX poll can no longer be disabled. |
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README.txt |
STATUS ====== 05/17: The basic NSH configuration is functional and shows that there is 3-4KB of free heap space. However, attempts to extend this have failed. I suspect that 8KB of SRAM is insufficient to do much with the existing NSH configuration. Perhaps some fine tuning can improve this situation but at this point, I think this board is only useful for the initial STM32 F0 bring-up, perhaps for embedded solutions that do not use NSH and for general experimentation. There is also support for the Nucleo boards with the STM32 F072 and F092 MCUs. Those ports do not suffer from these problems and seem to work well in fairly complex configurations. Apparently 8KB is SRAM is not usable but the parts with larger 16KB and 32KB SRAMs are better matches.