ae64f28344
This is a minimalistic SBI implementation for NuttX. Provides a single service for now: - Access to machine timer Provides a start trampoline to start NuttX in S-mode: - Exceptions / faults are delegated to S-mode. - External interrupts are delegated to S-mode. Machine mode timer is used as follows: - The timer compare match register reload happens in M-mode, via call gate "riscv_sbi_set_timer" - The compare match event is dispatched to S-mode ISR, which will notify the kernel to advance time - Clearing the STIP interrupt does not work from S-mode, so the call gate does this from M-mode The only supported (tested) target for now is MPFS.
40 lines
1.5 KiB
ArmAsm
40 lines
1.5 KiB
ArmAsm
/****************************************************************************
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* arch/risc-v/src/nuttsbi/sbi_machine_vectors.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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.section .text
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.balign 8
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.global __mtrap_vec
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/****************************************************************************
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* Name: __mtrap_vec
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*
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* Description:
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* All M-mode exceptions and interrupts will be handled from here.
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*
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****************************************************************************/
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__mtrap_vec:
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j machine_trap
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nop
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