p-szafonimateusz b1fd3da0f6 intel64/intel64_irq.c: support interrupts up to 255
From now all intel64 interrupts are supported.
Required step towards MSI/MSI-X

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 20:18:39 -03:00
..
2024-03-06 13:31:50 +08:00
2024-02-27 10:27:34 -03:00