73f7cc5855
tlsr82: first commit of telink tlsr82xx chip port. - tc32 archtecture context switch; - tc32 backtrace; - timer, uart, pwm, gpio, adc driver; - flash, watchdog driver; - uart txdma/rxdma; - spi console driver; - add board bringup and reset; Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
114 lines
3.7 KiB
C
114 lines
3.7 KiB
C
/****************************************************************************
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* arch/arm/src/tlsr82/tlsr82_clock.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/irq.h>
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#include <assert.h>
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#include <debug.h>
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#include "tlsr82_clock.h"
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#include "tlsr82_analog.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define MCU_CORE_B87 1
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#define SYSCLK_RC_CLOCK_EN 0
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#define CLOCK_SYS_CLOCK_HZ CPU_CLK
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#if (CLOCK_SYS_CLOCK_HZ == 12000000)
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# define SYS_CLK CLK_SYS_12M_CRYSTAL
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#elif (CLOCK_SYS_CLOCK_HZ == 16000000)
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# define SYS_CLK CLK_SYS_16M_CRYSTAL
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#elif (CLOCK_SYS_CLOCK_HZ == 24000000)
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# define SYS_CLK CLK_SYS_24M_CRYSTAL
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#elif ((CLOCK_SYS_CLOCK_HZ == 32000000) && (MCU_CORE_B85 || MCU_CORE_B87))
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# define SYS_CLK CLK_SYS_32M_CRYSTAL
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#elif ((CLOCK_SYS_CLOCK_HZ == 48000000) && (MCU_CORE_B85 || MCU_CORE_B87))
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# define SYS_CLK CLK_SYS_48M_CRYSTAL
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#else
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# error "sys clock error or undefined"
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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void clock_rc24m_init(void)
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{
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uint8_t cap;
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tlsr82_analog_write(0xc8, 0x80);
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tlsr82_analog_write(0x30, tlsr82_analog_read(0x30) | BIT(7));
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tlsr82_analog_write(0xc7, 0x0e);
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tlsr82_analog_write(0xc7, 0x0f);
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while ((tlsr82_analog_read(0xcf) & 0x80) == 0);
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/* Write 24m cap into manual register */
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cap = tlsr82_analog_read(0xcb);
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tlsr82_analog_write(0x33, cap);
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tlsr82_analog_write(0x30, tlsr82_analog_read(0x30) & (~BIT(7)));
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tlsr82_analog_write(0xc7, 0x0e);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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void tlsr82_clock_init(void)
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{
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CLK_SYS_SEL = (uint8_t)SYS_CLK;
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#if (SYSCLK_RC_CLOCK_EN)
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if (SYS_CLK < SYS_CLK_RC_THRES)
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{
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clock_rc_set(SYS_CLK);
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}
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#endif
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clock_rc24m_init();
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}
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