nuttx/arch/arm/src/armv7-a
2016-11-26 14:23:23 -06:00
..
addrenv.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_addrenv_kstack.c Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
arm_addrenv_shm.c Replace all occurrences of vdbg with vinfo 2016-06-11 11:59:51 -06:00
arm_addrenv_ustack.c Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
arm_addrenv_utils.c Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
arm_addrenv.c Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
arm_allocpage.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_assert.c SMP: Fix typos in some conditional compilation 2016-11-24 17:59:45 -06:00
arm_blocktask.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_checkmapping.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_coherent_dcache.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_copyarmstate.c ARMv7-A/M: Cosmetic changes 2015-12-14 11:56:39 -06:00
arm_copyfullstate.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_cpuhead.S ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently 2016-05-13 11:39:42 -06:00
arm_cpuidlestack.c ARMv7-A SMP: Allow CONFIG_SMP_NCPUS=1 for testing purposes 2016-05-18 09:17:02 -06:00
arm_cpuindex.c ARM: Remove some obsolete and incorrect conditional compilation 2016-03-11 12:42:58 -06:00
arm_cpupause.c SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
arm_cpustart.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_dataabort.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_doirq.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_elf.c armv7-a/armv6-m/arm/a1x: Convert *err() to either *info() or add ERROR:, depending on if an error is reported 2016-06-17 16:44:50 -06:00
arm_fpuconfig.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
arm_fullcontextrestore.S SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_gicv2_dump.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_gicv2.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_head.S Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
arm_initialstate.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_l2cc_pl310.c armv7-a/armv6-m/arm/a1x: Convert *err() to either *info() or add ERROR:, depending on if an error is reported 2016-06-17 16:44:50 -06:00
arm_memcpy.S ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit 2015-12-16 09:03:14 -06:00
arm_mmu.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_pgalloc.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_pghead.S Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
arm_pginitialize.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_physpgaddr.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_prefetchabort.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_releasepending.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_reprioritizertr.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_restorefpu.S Cosmetic changes from review of last PR 2016-04-18 06:50:45 -06:00
arm_savefpu.S Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_saveusercontext.S Cosmetic changes from review of last PR 2016-04-18 06:50:45 -06:00
arm_schedulesigaction.c ARMv7-A SMP: Add a little logic to signal handling. 2016-11-24 11:45:05 -06:00
arm_sigdeliver.c SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section. 2016-11-24 13:33:43 -06:00
arm_signal_dispatch.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_syscall.c Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00
arm_testset.S Fix a cloned typo 2016-10-19 09:14:21 -06:00
arm_unblocktask.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_undefinedinsn.c Add underscore at beginning of alert() as well 2016-06-16 12:38:05 -06:00
arm_va2pte.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_vectoraddrexcptn.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
arm_vectors.S SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm_vectortab.S Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_vfork.S
arm_virtpgaddr.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
arm.h ARMv7-A: Add GIC register definition header file 2016-02-29 18:13:51 -06:00
cache.h Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
cp15_cacheops.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
cp15_clean_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15_coherent_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15_flush_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15_invalidate_dcache_all.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
cp15_invalidate_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15.h ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
crt0.c SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
fpu.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
gic.h Centralize definitions associated with CONFIG_DEBUG_IRQ 2016-06-15 08:35:22 -06:00
gtm.h i.MX6: Add incomplete GPT header file 2016-03-09 09:08:01 -06:00
Kconfig Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
l2cc_pl310.h
l2cc.h ARMv7-A: Cosmetic changes 2015-12-14 08:42:39 -06:00
mmu.h SMP: Basic function 2016-11-26 14:23:23 -06:00
mpcore.h MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq() 2016-03-10 08:37:34 -06:00
pgalloc.h
sctlr.h Update some ARM registers for Cortex-A9 2016-03-29 11:47:35 -06:00
smp.h ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently 2016-05-13 11:39:42 -06:00
svcall.h ARMv7-A/M: Cosmetic changes 2015-12-14 11:56:39 -06:00
Toolchain.defs WINTOOl should be selected only for Cygwin. MSYS and native should not have it. 2016-01-09 16:34:33 -06:00