d42fc094fa
arm: stm32: codestyle fixes
* arm: stm32f0l0g0: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: stm32f7: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: stm32h7: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: stm32l4: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: stm32: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
291 lines
9.7 KiB
C
291 lines
9.7 KiB
C
/****************************************************************************
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* boards/arm/stm32l4/nucleo-l452re/include/board.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_STM32L4_NUCLEO_L452RE_INCLUDE_BOARD_H
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#define __BOARDS_ARM_STM32L4_NUCLEO_L452RE_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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#if defined(CONFIG_ARCH_CHIP_STM32L452RE)
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# include <arch/board/nucleo-l452re.h>
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#endif
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/* DMA Channel/Stream Selections ********************************************/
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/* Stream selections are arbitrary for now but might become important in
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* the future is we set aside more DMA channels/streams.
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*/
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/* Values defined in arch/arm/src/stm32l4/hardware/stm32l4x3xx_dma.h */
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#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */
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#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices */
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#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices */
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/* UART RX DMA configurations */
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#define DMACHAN_USART1_RX DMACHAN_USART1_RX_2
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/* ADC */
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#define ADC1_DMA_CHAN DMACHAN_ADC1_1
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/* Alternate function pin selections ****************************************/
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/* USART1:
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* RXD: PA10 CN9 pin 3, CN10 pin 33
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* PB7 CN7 pin 21
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* TXD: PA9 CN5 pin 1, CN10 pin 21
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* PB6 CN5 pin 3, CN10 pin 17
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*/
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#if 1
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# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
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# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
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#else
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# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
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# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
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#endif
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/* USART2: Connected to STLink Debug via PA2, PA3
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* RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37
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* PD6
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* TXD: PA2 CN9 pin 2 (See SB13, 14, 62, 63). CN10 pin 35
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* PD5
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*/
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#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
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#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */
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#define GPIO_USART2_RTS GPIO_USART2_RTS_2
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#define GPIO_USART2_CTS GPIO_USART2_CTS_2
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#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PC11 */
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#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PC10 */
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#define GPIO_UART4_RX GPIO_UART4_RX_1 /* PA1 */
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#define GPIO_UART4_TX GPIO_UART4_TX_1 /* PA0 */
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/* I2C
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*
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* The optional _GPIO configurations allow the I2C driver to manually
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* reset the bus to clear stuck slaves. They match the pin configuration,
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* but are normally-high GPIOs.
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*/
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#define GPIO_I2C1_SCL \
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(GPIO_I2C1_SCL_2 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
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#define GPIO_I2C1_SDA \
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(GPIO_I2C1_SDA_2 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
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#define GPIO_I2C1_SCL_GPIO \
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(GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
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GPIO_PORTB | GPIO_PIN8)
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#define GPIO_I2C1_SDA_GPIO \
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(GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
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GPIO_PORTB | GPIO_PIN9)
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#define GPIO_I2C2_SCL \
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(GPIO_I2C2_SCL_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
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#define GPIO_I2C2_SDA \
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(GPIO_I2C2_SDA_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
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#define GPIO_I2C2_SCL_GPIO \
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(GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
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GPIO_PORTB | GPIO_PIN10)
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#define GPIO_I2C2_SDA_GPIO \
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(GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \
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GPIO_PORTB | GPIO_PIN11)
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/* SPI */
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#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
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#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
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#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
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#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
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#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
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#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
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/* LEDs
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*
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* The Nucleo L452RE board provides a single user LED, LD2. LD2
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* is the green LED connected to Arduino signal D13 corresponding to MCU I/O
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* PA5 (pin 21) or PB13 (pin 34) depending on the STM32 target.
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*
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* - When the I/O is HIGH value, the LED is on.
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* - When the I/O is LOW, the LED is off.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LD2 0
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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#define BOARD_LD2_BIT (1 << BOARD_LD2)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/stm32_autoleds.c. The LEDs are used to encode
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* OS-related events as follows when the red LED (PE24) is available:
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*
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* SYMBOL Meaning LD2
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* ------------------- ----------------------- -----------
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* LED_STARTED NuttX has been started OFF
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* LED_HEAPALLOCATE Heap has been allocated OFF
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* LED_IRQSENABLED Interrupts enabled OFF
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* LED_STACKCREATED Idle stack created ON
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* LED_INIRQ In an interrupt No change
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* LED_SIGNAL In a signal handler No change
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* LED_ASSERTION An assertion failed No change
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* LED_PANIC The system has crashed Blinking
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* LED_IDLE MCU is is sleep mode Not used
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*
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* Thus if LD2, NuttX has successfully booted and is, apparently, running
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* normally. If LD2 is flashing at approximately 2Hz, then a fatal error
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* has been detected and the system has halted.
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*/
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 0
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#define LED_IRQSENABLED 0
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#define LED_STACKCREATED 1
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#define LED_INIRQ 1
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#define LED_SIGNAL 2
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#define LED_ASSERTION 2
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#define LED_PANIC 1
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/* Buttons
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*
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* B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
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* microcontroller.
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*/
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#define BUTTON_USER 0
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#define NUM_BUTTONS 1
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* ADC measurements
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* Default is ADC1_IN9 (PA4) connected to CN8-connector pin 3, A2.
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*/
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#define ADC1_MEASURE_CHANNEL 9
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#define GPIO_MEASURE_ADC (GPIO_ADC1_IN9)
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/* DAC
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* Default is PA4 (same as ADC, do not use both at the same time)
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*/
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#define GPIO_DAC1_OUT GPIO_DAC1_OUT_1
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/* Quadrature encoder
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* Default is to use timer 5 (32-bit) and encoder on PA0/PA1
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*/
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#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1
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#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
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#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_3
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#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_3
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#define GPIO_TIM5_CH1IN GPIO_TIM5_CH1IN_1
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#define GPIO_TIM5_CH2IN GPIO_TIM5_CH2IN_1
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/* PWM output for full bridge, uses config 1, because port E is N/A on QFP64
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* CH1 | 1(A8) 2(E9)
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* CH2 | 1(A9) 2(E11)
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* CHN1 | 1(A7) 2(B13) 3(E8)
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* CHN2 | 1(B0) 2(B14) 3(E10)
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*/
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#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
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#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1
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#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1
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#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32l4_board_initialize
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*
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* Description:
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* All STM32L4 architectures must provide the following entry point.
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* This entry point is called early in the initialization -- after all
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* memory has been configured and mapped but before any devices
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* have been initialized.
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*
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****************************************************************************/
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void stm32l4_board_initialize(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_ARM_STM32L4_NUCLEO_L452RE_INCLUDE_BOARD_H */
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