b95022f8de
since ACTLR.SMP need enable to make cache work on Cortex A7: https://developer.arm.com/documentation/ddi0464/f/CHDBIEIF Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com> |
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.. | ||
include | ||
src | ||
Kconfig |
b95022f8de
since ACTLR.SMP need enable to make cache work on Cortex A7: https://developer.arm.com/documentation/ddi0464/f/CHDBIEIF Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com> |
||
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.. | ||
include | ||
src | ||
Kconfig |