493b8de938
This reverts commit f735584514
.
These header changes introduce unacceptable errors:
1. The changes alter the width of the initial block comment. That will cause nxstyle failures on most of the files.
2. The third line of the header is an (optional) short description of content of the the file. This change erroneously removes that line.
Automated header file changes can screw up a lot of files, very quickly.
295 lines
12 KiB
C
295 lines
12 KiB
C
/****************************************************************************
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* boards/arm/sama5/sama5d4-ek/include/board.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_SAMA5_SAMA5D4_EK_INCLUDE_BOARD_H
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#define __BOARDS_ARM_SAMA5_SAMA5D4_EK_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
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* These definitions will configure operational clocking.
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*/
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/* On-board crystal frequencies */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
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#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
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#if defined(CONFIG_SAMA5_BOOT_SDRAM)
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/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate
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* bootloader.
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* That bootloader had to have already configured the PLL and SDRAM for
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* proper operation.
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*
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* In this case, we don not reconfigure the clocking.
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* Rather, we need to query the register settings to determine the clock
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* frequencies. We can only assume that the Main clock source is the on-board
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* 12MHz crystal.
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*/
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# include <arch/board/board_sdram.h>
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#elif defined(CONFIG_SAMA5D4EK_384MHZ)
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/* OHCI Only.
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* This is an alternative slower configuration that will produce a 48MHz
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* USB clock with the required accuracy using only PLLA.
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* When PPLA is used to clock OHCI, an additional requirement is the PLLACK
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* be a multiple of 48MHz.
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* This setup results in a CPU clock of 384MHz.
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*
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* This case is only interesting for experimentation.
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*/
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# include <arch/board/board_384mhz.h>
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#elif defined(CONFIG_SAMA5D4EK_528MHZ)
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/* This is the configuration results in a CPU clock of 528MHz.
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*
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* In this configuration, UPLL is the source of the UHPHS clock (if enabled).
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*/
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# include <arch/board/board_528mhz.h>
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#else /* #elif defined(CONFIG_SAMA5D4EK_396MHZ) */
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/* This is the configuration provided in the Atmel example code.
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* This setup results in a CPU clock of 396MHz.
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*
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* In this configuration, UPLL is the source of the UHPHS clock (if enabled).
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*/
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# include <arch/board/board_396mhz.h>
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#endif
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/* LED definitions **********************************************************/
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/* There are 3 LEDs on the SAMA5D4-EK:
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*
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* ------------------------------ ------------------- -----------------------
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* SAMA5D4 PIO SIGNAL USAGE
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* ------------------------------ ------------------- -----------------------
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* PE28/NWAIT/RTS4/A19 1Wire_PE28 1-WIRE ROM, LCD, D8 (green)
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* PE8/A8/TCLK3/PWML3 LED_USER_PE8 LED_USER (D10)
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* PE9/A9/TIOA2 LED_POWER_PE9 LED_POWER (D9, Red)
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* ------------------------------ ------------------- -----------------------
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*
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* - D8: D8 is shared with other functions and cannot be used if the 1-Wire
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* ROM is used.
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* I am not sure of the LCD function, but the LED may not be available if
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* the LCD is used either. We will avoid using D8 just for simplicity.
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* - D10: Nothing special here. A low output illuminates.
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* - D9: The Power ON LED. Connects to the via an IRLML2502 MOSFET.
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* This LED will be on when power is applied but otherwise a low output
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* value will turn it off.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_USER 0
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#define BOARD_POWER 1
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#define BOARD_NLEDS 2
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/* LED bits for use with board_userled_all() */
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#define BOARD_USER_BIT (1 << BOARD_BLUE)
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#define BOARD_POWER_BIT (1 << BOARD_RED)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
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* events as follows:
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*
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* SYMBOL Val Meaning LED state
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* Blue Red
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* ----------------- --- ----------------------- -------- --------
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*/
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#define LED_STARTED 0 /* NuttX has been started OFF OFF */
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#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */
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#define LED_STACKCREATED 1 /* Idle stack created ON OFF */
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#define LED_INIRQ 2 /* In an interrupt No change */
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#define LED_SIGNAL 2 /* In a signal handler No change */
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#define LED_ASSERTION 2 /* An assertion failed No change */
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#define LED_PANIC 3 /* The system has crashed OFF Blinking */
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#undef LED_IDLE /* MCU is is sleep mode Not used */
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/* Thus if the D0 and D9 are statically on, NuttX has successfully booted and
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* is, apparently, running normally. If the red D9 LED is flashing at
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* approximately 2Hz, then a fatal error has been detected and the system
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* has halted.
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*/
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/* Button definitions *******************************************************/
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/* A single button, PB_USER1 (PB2), is available on the SAMA5D4-EK:
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*
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* ------------------------------ ------------------- -----------------------
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* SAMA5D4 PIO SIGNAL USAGE
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* ------------------------------ ------------------- -----------------------
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* PE13/A13/TIOB1/PWML2 PB_USER1_PE13 PB_USER1
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* ------------------------------ ------------------- -----------------------
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*
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* Closing JP2 will bring PE13 to ground so
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* 1) PE13 should have a weak pull-up, and
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* 2) when PB2 is pressed, a low value will be senses.
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*/
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#define BUTTON_USER 0
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#define NUM_BUTTONS 1
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* LCD Interface, Geometry and Timing ***************************************/
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/* This configuration applies only to the TM7000 LCD/Touchscreen module.
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* Other LCDs will require changes.
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*
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* NOTE:
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* The TM7000 user manual claims that the hardware interface is 18-bit RGB666.
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* If you select that, you will get a very pink display (because the upper,
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* "red" bits floating high).
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* By trial and error, the 24-bit select was found to produce the correct
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* color output.
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*
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* NOTE:
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* Timings come from the smaller SAMA5D3x-EK LCD and have not been optimized
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* for this display.
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*/
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#define BOARD_LCDC_OUTPUT_BPP 24 /* Output format to H/W is 24 bpp RGB888 */
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#define BOARD_LCDC_WIDTH 800 /* Display width (pixels) */
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#define BOARD_LCDC_HEIGHT 480 /* Display height (rows) */
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#define BOARD_LCDC_MCK_MUL2 1 /* Source clock is 2*Mck (vs Mck) */
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#define BOARD_LCDC_PIXCLK_INV 1 /* Invert pixel clock, use falling edge */
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#define BOARD_LCDC_GUARDTIME 9 /* Guard time (frames) */
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#define BOARD_LCDC_VSPW 2 /* Vertical pulse width (lines) */
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#define BOARD_LCDC_HSPW 128 /* Horizontal pulse width (LCDDOTCLK) */
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#define BOARD_LCDC_VFPW 37 /* Vertical front porch (lines) */
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#define BOARD_LCDC_VBPW 8 /* Vertical back porch (lines) */
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#define BOARD_LCDC_HFPW 168 /* Horizontal front porch (LCDDOTCLK) */
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#define BOARD_LCDC_HBPW 88 /* Horizontal back porch (LCDDOTCLK) */
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/* Pixel clock rate in Hz (HS period * VS period * BOARD_LCDC_FRAMERATE). */
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#define BOARD_LCDC_FRAMERATE 40 /* Frame rate in Hz */
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#define BOARD_LCDC_HSPERIOD \
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(BOARD_LCDC_HSPW + BOARD_LCDC_HBPW + BOARD_LCDC_WIDTH + BOARD_LCDC_HFPW)
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#define BOARD_LCDC_VSPERIOD \
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(BOARD_LCDC_VSPW + BOARD_LCDC_VBPW + BOARD_LCDC_HEIGHT + BOARD_LCDC_VFPW)
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#define BOARD_LCDC_PIXELCLOCK \
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(BOARD_LCDC_HSPERIOD * BOARD_LCDC_VSPERIOD * BOARD_LCDC_FRAMERATE)
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/* Backlight prescaler value and PWM output polarity */
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#define BOARD_LCDC_PWMPS LCDC_LCDCFG6_PWMPS_DIV1
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#define BOARD_LCDC_PWMPOL LCDC_LCDCFG6_PWMPOL
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/* NAND *********************************************************************/
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/* Address for transferring command bytes to the nandflash, CLE A22 */
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#define BOARD_EBICS3_NAND_CMDADDR 0x60400000
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/* Address for transferring address bytes to the nandflash, ALE A21 */
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#define BOARD_EBICS3_NAND_ADDRADDR 0x60200000
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/* Address for transferring data bytes to the nandflash. */
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#define BOARD_EBICS3_NAND_DATAADDR 0x60000000
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/* Pin disambiguation *******************************************************/
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/* Alternative pin selections are provided with a numeric suffix like _1, _2,
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* etc.
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* Drivers, however, will use the pin selection without the numeric suffix.
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* Additional definitions are required in this board.h file. For example,
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* if we wanted the PCK0on PB26, then the following definition should appear
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* in the board.h header file for that board:
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*
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* #define PIO_PMC_PCK0 PIO_PMC_PCK0_1
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*
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* The PCK logic will then automatically configure PB26 as the PCK0 pin.
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*/
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/* SSC0 TD is provided on PB28 */
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#define PIO_SSC0_TD PIO_SSC0_TD_2
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/* PCK2 is provides the MCLK to the WM8904 audio CODEC via PB10 */
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#define PIO_PMC_PCK2 PIO_PMC_PCK2_1
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/* PCK0 and PCK1 are not currently used, but the PCK logic wants these
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* definitions anyway.
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* The assignments here are arbitrary and will not be used (at least not
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* until we implement ISI of HDMI).
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*
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* PIO_PMC_PCK0_1: PB26 is used by I2S with the WM8904 (AUDIO_RK0_PB26)
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* PIO_PMC_PCK0_2: PD8 is the HDMI MCLK (HDMI_MCK_PD8)
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* PIO_PMC_PCK0_3: PA24 is used for the LCD backlight (LCD_PWM_PA24)
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*
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* PIO_PMC_PCK1_1: PD31 goes to the expansion interface and is not used
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* on-board (EXP_PD31).
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* PIO_PMC_PCK1_2: PC24 is used for ISI data (ISI_D5)
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* PIO_PMC_PCK1_3: PC4 is ISI_MCK_PC4, MCI0_CK_PC4, EXP_PC4
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*/
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#define PIO_PMC_PCK0 PIO_PMC_PCK0_2
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#define PIO_PMC_PCK1 PIO_PMC_PCK1_1
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/****************************************************************************
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* Assembly Language Macros
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****************************************************************************/
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#ifdef __ASSEMBLY__
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.macro config_sdram
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_ARM_SAMA5_SAMA5D4_EK_INCLUDE_BOARD_H */
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