f362d161db
arm: codestyle fixes 1
* arm: a1x: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: am335x: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: c5471: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: cxd56xx: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: dm320: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: efm32: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: imx6: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: imxrt: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: kinetis: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
148 lines
5.4 KiB
C
148 lines
5.4 KiB
C
/****************************************************************************
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* boards/arm/dm320/ntods-dm320/include/board/board.h
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*
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* Copyright (C) 2007-201, 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_DM320_NTOSD_DM320_INCLUDE_BOARD_H
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#define __BOARDS_ARM_DM320_NTOSD_DM320_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* This platform has the ARM at 175 MHz and the DSP at 101.25 MHz */
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#define DM320_ARM_CLOCK 175500000
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#define DM320_SDR_CLOCK 101250000
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#define DM320_DSP_CLOCK 101250000
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#define DM320_AXL_CLOCK 175500000
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#define DM320_AHB_CLOCK 87750000
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/* UART0/1 and TIMER0/1 are clocked by PLLIN=27MHz */
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#define CONFIG_DM320_UARTPPLIN 1
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/* Configration for dm9000 network device */
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#define DM9000_BASE CONFIG_DM9000_BASE
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/* Memory Map ***************************************************************/
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/* The Neuros development board has 16MiB RAM starting at 0x01000000
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* (physical) and 8MiB of FLASH.
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* The Neuros OSD 1.0 consumer has 32MiB RAM starting at 0x01100000
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* (physical) and 16MiB of FLASH.
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*
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* FIXME: Flash location may also differ on OSD 1.0 consumer unit!
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*/
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#ifdef CONFIG_ARCH_NTOSD_DEVBOARD
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# if CONFIG_RAM_START != 0x01000000
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# error "Invalid setting for CONFIG_RAM_START"
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# endif
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# if CONFIG_RAM_SIZE != 0x01000000
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# warning "Check CONFIG_RAM_SIZE. This Neuros OSD has 0x01000000 bytes of SDRAM"
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# endif
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# define DM320_SDRAM_PSECTION 0x01000000 /* 496Mb many section -- */
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# define DM320_SDRAM_PADDR 0x01000000 /* 496Mb many sections CW */
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#else
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# if CONFIG_RAM_START != 0x01100000
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# error "Invalid setting for CONFIG_RAM_START"
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# endif
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# if CONFIG_RAM_SIZE != 0x02000000
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# warning "Check CONFIG_RAM_SIZE. This Neuros OSD has 0x02000000 bytes of SDRAM"
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# endif
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# define DM320_SDRAM_PSECTION 0x01100000 /* 496Mb many section -- */
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# define DM320_SDRAM_PADDR 0x01100000 /* 496Mb many sections CW */
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#endif
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/* GIO keyboard (GIO 1-5) */
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#define KEY_MASK 0x003E
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#define KEY_SCAN0_BIT 0x0002
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#define KEY_SCAN1_BIT 0x0004
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#define KEY_SCAN2_BIT 0x0008
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#define KEY_SCAN3_BIT 0x0010
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#define KEY_SCAN4_BIT 0x0020
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#define KEY_GIO_DIR0_VAL KEY_MASK /* Configure as INPUT */
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#define KEY_GIO_INV0_VAL KEY_MASK /* All inverted */
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#define KEY_GIO_SET0_VAL (0) /* Initialized to zero */
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#define KEY_GIO_CLR0_VAL (0)
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#define GIO_KEY_SCAN0 1
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#define GIO_KEY_SCAN1 2
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#define GIO_KEY_SCAN2 3
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#define GIO_KEY_SCAN3 4
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#define GIO_KEY_SCAN4 5
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#define GIO_MS_DETECT 5
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#define GIO_DM9000A_INT 6
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#define GIO_MMC_DETECT 8
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#define GIO_CFC_DETECT 9
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#define GIO_VIDEO_IN 10
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#define GIO_LED_RED 16
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#define GIO_LED_GREEN 17
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#define GIO_CFC_ENABLE 25
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#define GIO_I2C_SCL 30
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#define GIO_I2C_SDA 31
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#define GIO_ENA_VIDEO 32
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#define GIO_CFC_RESET 36
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#define GIO_CFC_STSCHG 37
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/* LED Usage */
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 0
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#define LED_IRQSENABLED 0
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#define LED_STACKCREATED GIO_LED_GREEN
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#define LED_INIRQ GIO_LED_RED
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#define LED_SIGNAL GIO_LED_RED
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#define LED_ASSERTION GIO_LED_RED
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#define LED_PANIC GIO_LED_RED
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#define LED_IDLE 0
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#endif
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#endif /* __BOARDS_ARM_DM320_NTOSD_DM320_INCLUDE_BOARD_H */
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